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Update uart_ll.h - Fixing division by zero (IDFGH-10990) #12179

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Update uart_ll.h - Fixing division by zero (IDFGH-10990) #12179

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cf0a05d
Update uart_ll.h - Fixing division by zero
educampos28 Sep 1, 2023
3f40c80
Update uart_ll.h
educampos28 Sep 7, 2023
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7 changes: 5 additions & 2 deletions components/hal/esp32s3/include/hal/uart_ll.h
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Original file line number Diff line number Diff line change
Expand Up @@ -131,9 +131,12 @@ FORCE_INLINE_ATTR void uart_ll_get_sclk(uart_dev_t *hw, soc_module_clk_t *source
*/
FORCE_INLINE_ATTR void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud, uint32_t sclk_freq)
{
#define DIV_UP(a, b) (((a) + (b) - 1) / (b))
#define DIV_UP(a, b) ((uint64_t)((a) + (b) - 1) / (b))
const uint32_t max_div = BIT(12) - 1; // UART divider integer part only has 12 bits
int sclk_div = DIV_UP(sclk_freq, max_div * baud);
uint32_t sclk_div = DIV_UP(sclk_freq, max_div * baud);

if (sclk_div == 0)
sclk_div = 1;

uint32_t clk_div = ((sclk_freq) << 4) / (baud * sclk_div);
// The baud rate configuration register is divided into
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