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Merge branch 'bugfix/fix_deinit_init_wifi_scan_fail_issue_v4.3' into …
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…'release/v4.3'

Bugfix/fix deinit init wifi scan fail issue v4.3(Backport v4.3)

See merge request espressif/esp-idf!27048
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@jack0c
jack0c committed Nov 14, 2023
2 parents 5af1c9e + 481a064 commit ca64739
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Showing 8 changed files with 26 additions and 21 deletions.
4 changes: 2 additions & 2 deletions components/driver/periph_ctrl.c
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Expand Up @@ -54,7 +54,7 @@ IRAM_ATTR void wifi_bt_common_module_enable(void)
{
portENTER_CRITICAL_SAFE(&periph_spinlock);
if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
periph_ll_wifi_bt_module_enable_clk_clear_rst();
periph_ll_wifi_bt_module_enable_clk();
}
ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++;
portEXIT_CRITICAL_SAFE(&periph_spinlock);
Expand All @@ -65,7 +65,7 @@ IRAM_ATTR void wifi_bt_common_module_disable(void)
portENTER_CRITICAL_SAFE(&periph_spinlock);
ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]--;
if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
periph_ll_wifi_bt_module_disable_clk_set_rst();
periph_ll_wifi_bt_module_disable_clk();
}
portEXIT_CRITICAL_SAFE(&periph_spinlock);
}
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12 changes: 11 additions & 1 deletion components/esp_wifi/src/phy_init.c
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Expand Up @@ -48,6 +48,10 @@
#include "esp32s3/rom/rtc.h"
#include "soc/rtc_cntl_reg.h"
#endif

#if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#endif
#include "hal/efuse_hal.h"

#if CONFIG_IDF_TARGET_ESP32
Expand Down Expand Up @@ -298,11 +302,17 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
_lock_acquire(&s_wifi_bt_pd_controller.lock);
if (s_wifi_bt_pd_controller.count++ == 0) {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
#if !CONFIG_IDF_TARGET_ESP32
esp_rom_delay_us(10);
wifi_bt_common_module_enable();
#if CONFIG_IDF_TARGET_ESP32
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
#else
SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
#endif
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
wifi_bt_common_module_disable();
}
_lock_release(&s_wifi_bt_pd_controller.lock);
}
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6 changes: 2 additions & 4 deletions components/hal/esp32/include/hal/clk_gate_ll.h
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Expand Up @@ -245,16 +245,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
{
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
{
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}

static inline void periph_ll_reset(periph_module_t periph)
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6 changes: 2 additions & 4 deletions components/hal/esp32c3/include/hal/clk_gate_ll.h
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Expand Up @@ -216,16 +216,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}

static inline void periph_ll_reset(periph_module_t periph)
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6 changes: 2 additions & 4 deletions components/hal/esp32s2/include/hal/clk_gate_ll.h
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Expand Up @@ -269,16 +269,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
{
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
{
DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
}

static inline void periph_ll_reset(periph_module_t periph)
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6 changes: 2 additions & 4 deletions components/hal/esp32s3/include/hal/clk_gate_ll.h
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Expand Up @@ -257,16 +257,14 @@ static inline void periph_ll_disable_clk_set_rst(periph_module_t periph)
DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false));
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk_clear_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_enable_clk(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}

static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk_set_rst(void)
static inline void IRAM_ATTR periph_ll_wifi_bt_module_disable_clk(void)
{
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M);
DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
}

static inline void periph_ll_reset(periph_module_t periph)
Expand Down
4 changes: 3 additions & 1 deletion components/soc/esp32/include/soc/dport_reg.h
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Expand Up @@ -1088,8 +1088,10 @@
#define DPORT_RW_BTMAC_RST BIT(9)
#define DPORT_RW_BTLP_RST BIT(10)

//ESP32 should not reset FE in esp_wifi_bt_power_domain_on().
//The FE of ESP32 is not in the WIFI PD power domain.
//When turning off WIFI PD, the FE will not power down, so phy_wakeup_init() did not rewrite the FE register.
#define MODEM_RESET_FIELD_WHEN_PU (DPORT_WIFIBB_RST | \
DPORT_FE_RST | \
DPORT_WIFIMAC_RST | \
DPORT_BTBB_RST | \
DPORT_BTMAC_RST | \
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3 changes: 2 additions & 1 deletion components/soc/esp32s2/include/soc/syscon_reg.h
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Expand Up @@ -443,7 +443,8 @@ extern "C" {
#define DPORT_WIFI_CLK_BT_EN_V 0x61
#define DPORT_WIFI_CLK_BT_EN_S 11
/* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M

/* Digital team to check */
//bluetooth baseband bit11
Expand Down

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