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changed to no longer use esp-idf-cxx SPI subsystem for LCD because it…
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… abuses memory. updated with working controller input (new controller component using new espp::Joystick component)
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finger563 committed Nov 3, 2022
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67 changes: 67 additions & 0 deletions README.md
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Expand Up @@ -5,6 +5,8 @@ Emulator(s) running on ESP BOX

This project is a little retro game emulation system running on ESP32-S3-BOX.

## Videos

## Images

![zelda](./images/zelda.jpeg)
Expand All @@ -19,6 +21,7 @@ This project is designed to have:
- [x] BT Gamepad input (see note below)
- [x] Loading of gui data (rom titles and boxart) from metadata file
- [x] Audio output (using I2S + es8311 audio codec)
- [x] Interaction with analog joystick + buttons
- [ ] Emulators to choose from:
- [x] NES emulator
- [ ] GB/GBC emulator
Expand Down Expand Up @@ -60,6 +63,43 @@ This project is designed to have:
doesn't support BT Classic and I'm not aware of any BLE gamepads (or at
least I don't have any).

## Flashing

Note: you will need to set up a `flash_data/` folder which contains your roms
(.nes, .gb, .gbc), images (.sjpg), and metadata.csv.

NOTE: the images must be converted to `sjpg` from `jpg`, and must be 100x100 px
jpgs beforehand.

For ease of use, there is a
[./boxart/source/resize.bash](./boxart/source/resize.bash) script which will
resize all `jpg` images in the `boxart/source` folder to be 100x100 px and put
the resized versions in the `boxart` folder. From there, you can simply run:

``` shell
find . -maxdepth 1 -iname "*.jpg" -exec python jpg_to_sjpg.py {} \;
```

to convert all the jpg files into sjpg files. You can discard the `.bin` and
`.c` files that are also generated.

### Metadata.csv format

``` csv
<rom filename>, <rom boxart filename>, <rom display name>
```

Example:

``` csv
mario.nes, boxart_mario.sjpg, Mario Bros.
zelda.nes, boxart_zelda.sjpg, The Legend of Zelda
megaman.nes, boxart_megaman.sjpg, MegaMan
metroid.nes, boxart_metroid.sjpg, Metroid
pokemon_yellow.gbc, boxart_pokemon_yellow.sjpg, Pokemon Yellow
links_awakening.gb, boxart_links_awakening.sjpg, The Legend of Zelda: Link's Awakening
```

## References and Inspiration:

### ESP32 S3 Box Info:
Expand Down Expand Up @@ -126,6 +166,33 @@ I2C Pinout:
* IO18: I2C SCL
* IO08: I2C SDA

### Joy bonnet

The [joy bonnet](https://pinout.xyz/pinout/joy_bonnet) was designed as a
raspberry pi hat which has abxy, start/select, analog joystick, and player 1 /
player 2 buttons. It's useful for prototyping input / hardware and testing how
well the emulators run (by playing them of course ;) )

Pinout (pin number is w.r.t. header, not pi GPIO):
* A: pin 32
* B: pin 31
* X: pin 36
* Y: pin 33
* Start: pin 37
* Select: pin 38
* Ground: pins 6, 9, 14, 20, 25, 30, 34, 39
* 5V: pins 2, 4
* 3V3: pins 1, 17

The Joystick is accessible via an I2C ADC ([see
here](https://github.com/adafruit/Adafruit-Retrogame/blob/master/joyBonnet.py)):
* SDA: pin 3
* SCL: pin 5
* Chipset: ADS1015
* Default Address: 0x48
* Y-axis: Channel 0
* X-axis: Channel 1

### Other NES Emulators
* https://github.com/nesemu/NESemu
* https://github.com/NiwakaDev/NIWAKA_NES
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#!/bin/bash
mkdir -p _100x100
find . -maxdepth 1 -iname "*.jpg" | xargs -L1 -I{} convert -resize 100x100 "{}" _100x100/"{}"
find . -maxdepth 1 -iname "*.jpg" | xargs -L1 -I{} convert -resize 100x100 "{}" ../"{}"
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2 changes: 1 addition & 1 deletion components/box-emu-hal/CMakeLists.txt
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idf_component_register(
INCLUDE_DIRS "include"
SRC_DIRS "src"
REQUIRES "driver" "esp_lcd" "spi_flash" "nvs_flash" "codec" "esp-idf-cxx" "display" "display_drivers"
REQUIRES "driver" "esp_lcd" "spi_flash" "nvs_flash" "codec" "display" "display_drivers" "controller"
)
121 changes: 121 additions & 0 deletions components/box-emu-hal/include/ads1x15.h
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#pragma once

/*=========================================================================
I2C ADDRESS/BITS
-----------------------------------------------------------------------*/
#define ADS1X15_ADDRESS (0x48) ///< 1001 000 (ADDR = GND)
/*=========================================================================*/

/*=========================================================================
POINTER REGISTER
-----------------------------------------------------------------------*/
#define ADS1X15_REG_POINTER_MASK (0x03) ///< Point mask
#define ADS1X15_REG_POINTER_CONVERT (0x00) ///< Conversion
#define ADS1X15_REG_POINTER_CONFIG (0x01) ///< Configuration
#define ADS1X15_REG_POINTER_LOWTHRESH (0x02) ///< Low threshold
#define ADS1X15_REG_POINTER_HITHRESH (0x03) ///< High threshold
/*=========================================================================*/

/*=========================================================================
CONFIG REGISTER
-----------------------------------------------------------------------*/
#define ADS1X15_REG_CONFIG_OS_MASK (0x8000) ///< OS Mask
#define ADS1X15_REG_CONFIG_OS_SINGLE \
(0x8000) ///< Write: Set to start a single-conversion
#define ADS1X15_REG_CONFIG_OS_BUSY \
(0x0000) ///< Read: Bit = 0 when conversion is in progress
#define ADS1X15_REG_CONFIG_OS_NOTBUSY \
(0x8000) ///< Read: Bit = 1 when device is not performing a conversion

#define ADS1X15_REG_CONFIG_MUX_MASK (0x7000) ///< Mux Mask
#define ADS1X15_REG_CONFIG_MUX_DIFF_0_1 \
(0x0000) ///< Differential P = AIN0, N = AIN1 (default)
#define ADS1X15_REG_CONFIG_MUX_DIFF_0_3 \
(0x1000) ///< Differential P = AIN0, N = AIN3
#define ADS1X15_REG_CONFIG_MUX_DIFF_1_3 \
(0x2000) ///< Differential P = AIN1, N = AIN3
#define ADS1X15_REG_CONFIG_MUX_DIFF_2_3 \
(0x3000) ///< Differential P = AIN2, N = AIN3
#define ADS1X15_REG_CONFIG_MUX_SINGLE_0 (0x4000) ///< Single-ended AIN0
#define ADS1X15_REG_CONFIG_MUX_SINGLE_1 (0x5000) ///< Single-ended AIN1
#define ADS1X15_REG_CONFIG_MUX_SINGLE_2 (0x6000) ///< Single-ended AIN2
#define ADS1X15_REG_CONFIG_MUX_SINGLE_3 (0x7000) ///< Single-ended AIN3

constexpr uint16_t MUX_BY_CHANNEL[] = {
ADS1X15_REG_CONFIG_MUX_SINGLE_0, ///< Single-ended AIN0
ADS1X15_REG_CONFIG_MUX_SINGLE_1, ///< Single-ended AIN1
ADS1X15_REG_CONFIG_MUX_SINGLE_2, ///< Single-ended AIN2
ADS1X15_REG_CONFIG_MUX_SINGLE_3 ///< Single-ended AIN3
}; ///< MUX config by channel

#define ADS1X15_REG_CONFIG_PGA_MASK (0x0E00) ///< PGA Mask
#define ADS1X15_REG_CONFIG_PGA_6_144V (0x0000) ///< +/-6.144V range = Gain 2/3
#define ADS1X15_REG_CONFIG_PGA_4_096V (0x0200) ///< +/-4.096V range = Gain 1
#define ADS1X15_REG_CONFIG_PGA_2_048V \
(0x0400) ///< +/-2.048V range = Gain 2 (default)
#define ADS1X15_REG_CONFIG_PGA_1_024V (0x0600) ///< +/-1.024V range = Gain 4
#define ADS1X15_REG_CONFIG_PGA_0_512V (0x0800) ///< +/-0.512V range = Gain 8
#define ADS1X15_REG_CONFIG_PGA_0_256V (0x0A00) ///< +/-0.256V range = Gain 16

#define ADS1X15_REG_CONFIG_MODE_MASK (0x0100) ///< Mode Mask
#define ADS1X15_REG_CONFIG_MODE_CONTIN (0x0000) ///< Continuous conversion mode
#define ADS1X15_REG_CONFIG_MODE_SINGLE \
(0x0100) ///< Power-down single-shot mode (default)

#define ADS1X15_REG_CONFIG_RATE_MASK (0x00E0) ///< Data Rate Mask

#define ADS1X15_REG_CONFIG_CMODE_MASK (0x0010) ///< CMode Mask
#define ADS1X15_REG_CONFIG_CMODE_TRAD \
(0x0000) ///< Traditional comparator with hysteresis (default)
#define ADS1X15_REG_CONFIG_CMODE_WINDOW (0x0010) ///< Window comparator

#define ADS1X15_REG_CONFIG_CPOL_MASK (0x0008) ///< CPol Mask
#define ADS1X15_REG_CONFIG_CPOL_ACTVLOW \
(0x0000) ///< ALERT/RDY pin is low when active (default)
#define ADS1X15_REG_CONFIG_CPOL_ACTVHI \
(0x0008) ///< ALERT/RDY pin is high when active

#define ADS1X15_REG_CONFIG_CLAT_MASK \
(0x0004) ///< Determines if ALERT/RDY pin latches once asserted
#define ADS1X15_REG_CONFIG_CLAT_NONLAT \
(0x0000) ///< Non-latching comparator (default)
#define ADS1X15_REG_CONFIG_CLAT_LATCH (0x0004) ///< Latching comparator

#define ADS1X15_REG_CONFIG_CQUE_MASK (0x0003) ///< CQue Mask
#define ADS1X15_REG_CONFIG_CQUE_1CONV \
(0x0000) ///< Assert ALERT/RDY after one conversions
#define ADS1X15_REG_CONFIG_CQUE_2CONV \
(0x0001) ///< Assert ALERT/RDY after two conversions
#define ADS1X15_REG_CONFIG_CQUE_4CONV \
(0x0002) ///< Assert ALERT/RDY after four conversions
#define ADS1X15_REG_CONFIG_CQUE_NONE \
(0x0003) ///< Disable the comparator and put ALERT/RDY in high state (default)
/*=========================================================================*/

/** Gain settings */
typedef enum {
GAIN_TWOTHIRDS = ADS1X15_REG_CONFIG_PGA_6_144V,
GAIN_ONE = ADS1X15_REG_CONFIG_PGA_4_096V,
GAIN_TWO = ADS1X15_REG_CONFIG_PGA_2_048V,
GAIN_FOUR = ADS1X15_REG_CONFIG_PGA_1_024V,
GAIN_EIGHT = ADS1X15_REG_CONFIG_PGA_0_512V,
GAIN_SIXTEEN = ADS1X15_REG_CONFIG_PGA_0_256V
} adsGain_t;

/** Data rates */
#define RATE_ADS1015_128SPS (0x0000) ///< 128 samples per second
#define RATE_ADS1015_250SPS (0x0020) ///< 250 samples per second
#define RATE_ADS1015_490SPS (0x0040) ///< 490 samples per second
#define RATE_ADS1015_920SPS (0x0060) ///< 920 samples per second
#define RATE_ADS1015_1600SPS (0x0080) ///< 1600 samples per second (default)
#define RATE_ADS1015_2400SPS (0x00A0) ///< 2400 samples per second
#define RATE_ADS1015_3300SPS (0x00C0) ///< 3300 samples per second

#define RATE_ADS1115_8SPS (0x0000) ///< 8 samples per second
#define RATE_ADS1115_16SPS (0x0020) ///< 16 samples per second
#define RATE_ADS1115_32SPS (0x0040) ///< 32 samples per second
#define RATE_ADS1115_64SPS (0x0060) ///< 64 samples per second
#define RATE_ADS1115_128SPS (0x0080) ///< 128 samples per second (default)
#define RATE_ADS1115_250SPS (0x00A0) ///< 250 samples per second
#define RATE_ADS1115_475SPS (0x00C0) ///< 475 samples per second
#define RATE_ADS1115_860SPS (0x00E0) ///< 860 samples per second
28 changes: 28 additions & 0 deletions components/box-emu-hal/include/input.h
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#pragma once

#ifdef __cplusplus
extern "C"
{
#endif

struct InputState {
int a : 1;
int b : 1;
int x : 1;
int y : 1;
int select : 1;
int start : 1;
int up : 1;
int down : 1;
int left : 1;
int right : 1;
int joystick_select : 1;
};

void init_input();
bool read_joystick(float *x, float *y);
void get_input_state(struct InputState *state);

#ifdef __cplusplus
}
#endif
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