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added DMA driver channel0 - fixes #35
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gehadelkoumy committed Apr 29, 2023
1 parent 423d179 commit 0019870
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14 changes: 14 additions & 0 deletions MCAL_Drivers/DMA/include/DMA_config.h
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/*****************************************/
/* Author : Gehad Elkoumy */
/* Version : V01 */
/* Date : 23 April 2023 */
/*****************************************/

#ifndef DMA_CONFIG_H
#define DMA_CONFIG_H

/* Options : channels from 1 to 7 */
//#define channelID 1


#endif
13 changes: 13 additions & 0 deletions MCAL_Drivers/DMA/include/DMA_interface.h
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/*****************************************/
/* Author : Gehad Elkoumy */
/* Version : V01 */
/* Date : 23 April 2023 */
/*****************************************/

#ifndef DMA_INTERFACE_H_
#define DMA_INTERFACE_H_

void MDMA_voidChannel1Init(void);
void MDMA_voidChannel1Start(u32 *Copy_Pointeru32SourceAddress, u32 *Copy_Pointer32DestinationAddress, u16 Copy_u16BlockLength);

#endif
32 changes: 32 additions & 0 deletions MCAL_Drivers/DMA/include/DMA_private.h
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/*****************************************/
/* Author : Gehad Elkoumy */
/* Version : V01 */
/* Date : 23 April 2023 */
/*****************************************/

#ifndef DMA_PRIVATE_H_
#define DMA_PRIVATE_H_

/*Array for 7 channels*/
typedef struct
{
volatile u32 CCR;
volatile u32 CNDTR;
volatile u32 CPAR;
volatile u32 CMAR;
volatile u32 Reserved;
}DMA_Channel;

typedef struct
{
/*flags for the 7 channels*/
volatile u32 ISR;
volatile u32 IFCR;

/*each register is an array of 7 elements(each channel has a register)*/
DMA_Channel Channel[7];
}DMA_t;

#define DMA ((volatile DMA_t*)0x40020000)

#endif
48 changes: 48 additions & 0 deletions MCAL_Drivers/DMA/src/DMA_program.c
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/*****************************************/
/* Author : Gehad Elkoumy */
/* Version : V01 */
/* Date : 23 April 2023 */
/*****************************************/

#include "STD_TYPES.h"
#include "BIT_MATH.h"

#include "DMA_interface.h"
#include "DMA_private.h"
#include "DMA_config.h"

void MDMA_voidChannel1Init(void)
{
/* channel priority level is low */
/* Memory size of 16-bits */
SET_BIT(DMA->Channel[0].CCR , 10);
CLR_BIT(DMA->Channel[0].CCR , 11);

/* Peripheral size of 16-bits */
SET_BIT(DMA->Channel[0].CCR , 8);
CLR_BIT(DMA->Channel[0].CCR , 9);

/* Enable memory increment mode */
SET_BIT(DMA->Channel[0].CCR , 7);

/* Enable circular mode */
SET_BIT(DMA->Channel[0].CCR , 5);

}


void MDMA_voidChannel1Start(u32 *Copy_Pointer32SourceAddress, u32 *Copy_Pointeru32DestinationAddress, u16 Copy_u16BlockLength)
{
/* channel must be disabled first */
CLR_BIT(DMA->Channel[0].CCR , 0);

/*Load the source & destination addresses*/
DMA->Channel[0].CPAR = Copy_Pointer32SourceAddress;
DMA->Channel[0].CMAR = Copy_Pointeru32DestinationAddress;

/*Load the block length*/
DMA->Channel[0].CNDTR = Copy_u16BlockLength;

/*Enable channel*/
SET_BIT(DMA->Channel[0].CCR , 0);
}

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