Merge pull request #1032 from LambertusIJsselstein/master

MSP430FR2xx_4xx: set vlo_freq variable to REFO clock frequency
energia · Nov 21, 2018 · 3116b84 · 3116b84
2 parents 1e7b8d5 + 468220b
commit 3116b84
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/hardware/msp430/cores/msp430/wiring.c b/hardware/msp430/cores/msp430/wiring.c
@@ -136,10 +136,10 @@ void enableXtal()
 	/* Test the fault flag */
 	}while (SFRIFG1 & OFIFG);
 
-	/* If starting the XTAL timed out then fall back to VLO */
+	/* If starting the XTAL timed out then fall back to REFO */
 	if(!timeout) {
-		/* ACLK = VLO = ~ 12 KHz */
-		vlo_freq = 8000;
+		/* ACLK = REFO = ~ 32 KHz */
+		vlo_freq = 32768;
 		/* Source ACLK from REFO */
 		CSCTL4 |= SELA__REFOCLK;
 	}