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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -44,54 +44,58 @@ | |
| __email__ = "[email protected]" | ||
| __copyright__ = "2021-2023, Patrick Lehmann" | ||
| __license__ = "Apache License, Version 2.0" | ||
| __version__ = "0.4.0" | ||
| __version__ = "0.4.1" | ||
|
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||
|
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||
| @export | ||
| @unique | ||
| class SystemVerilogVersion(Enum): | ||
| Any = -1 | ||
| Any = -1 | ||
|
|
||
| Verilog95 = 95 | ||
| Verilog2001 = 1 | ||
| Verilog2005 = 5 | ||
| Verilog95 = 95 | ||
| Verilog2001 = 1 | ||
| Verilog2005 = 5 | ||
|
|
||
| SystemVerilog2005 = 2005 | ||
| SystemVerilog2009 = 2009 | ||
| SystemVerilog2012 = 2012 | ||
| SystemVerilog2017 = 2017 | ||
| SystemVerilog2005 = 2005 | ||
| SystemVerilog2009 = 2009 | ||
| SystemVerilog2012 = 2012 | ||
| SystemVerilog2017 = 2017 | ||
|
|
||
| Latest = 10000 | ||
|
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||
| __VERSION_MAPPINGS__: Dict[Union[int, str], Enum] = { | ||
| -1: Any, | ||
| 95: Verilog95, | ||
| 1: Verilog2001, | ||
| 5: Verilog2005, | ||
| # 5: SystemVerilog2005, # prefer Verilog on numbers below 2000 | ||
| 9: SystemVerilog2009, | ||
| 12: SystemVerilog2012, | ||
| 17: SystemVerilog2017, | ||
| 1995: Verilog95, | ||
| 2001: Verilog2001, | ||
| # 2005: Verilog2005, # prefer SystemVerilog on numbers above 2000 | ||
| 2005: SystemVerilog2005, | ||
| 2009: SystemVerilog2009, | ||
| 2012: SystemVerilog2012, | ||
| 2017: SystemVerilog2017, | ||
| "Any": Any, | ||
| "95": Verilog95, | ||
| "01": Verilog2001, | ||
| "05": Verilog2005, | ||
| # "05": SystemVerilog2005, # prefer Verilog on numbers below 2000 | ||
| "09": SystemVerilog2009, | ||
| "12": SystemVerilog2012, | ||
| "17": SystemVerilog2017, | ||
| "1995": Verilog95, | ||
| "2001": Verilog2001, | ||
| # "2005": Verilog2005, # prefer SystemVerilog on numbers above 2000 | ||
| "2005": SystemVerilog2005, | ||
| "2009": SystemVerilog2009, | ||
| "2012": SystemVerilog2012, | ||
| "2017": SystemVerilog2017, | ||
| -1: Any, | ||
| 95: Verilog95, | ||
| 1: Verilog2001, | ||
| 5: Verilog2005, | ||
| # 5: SystemVerilog2005, # prefer Verilog on numbers below 2000 | ||
| 9: SystemVerilog2009, | ||
| 12: SystemVerilog2012, | ||
| 17: SystemVerilog2017, | ||
| 1995: Verilog95, | ||
| 2001: Verilog2001, | ||
| # 2005: Verilog2005, # prefer SystemVerilog on numbers above 2000 | ||
| 2005: SystemVerilog2005, | ||
| 2009: SystemVerilog2009, | ||
| 2012: SystemVerilog2012, | ||
| 2017: SystemVerilog2017, | ||
| 10000: Latest, | ||
| "Any": Any, | ||
| "95": Verilog95, | ||
| "01": Verilog2001, | ||
| "05": Verilog2005, | ||
| # "05": SystemVerilog2005, # prefer Verilog on numbers below 2000 | ||
| "09": SystemVerilog2009, | ||
| "12": SystemVerilog2012, | ||
| "17": SystemVerilog2017, | ||
| "1995": Verilog95, | ||
| "2001": Verilog2001, | ||
| # "2005": Verilog2005, # prefer SystemVerilog on numbers above 2000 | ||
| "2005": SystemVerilog2005, | ||
| "2009": SystemVerilog2009, | ||
| "2012": SystemVerilog2012, | ||
| "2017": SystemVerilog2017, | ||
| "Latest": Latest | ||
| } | ||
|
|
||
| def __init__(self, *_): | ||
|
|
@@ -107,37 +111,131 @@ def Parse(cls, value: Union[int, str]) -> "SystemVerilogVersion": | |
| except KeyError: | ||
| raise ValueError("Value '{0!s}' cannot be parsed to member of {1}.".format(value, cls.__name__)) | ||
|
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||
| def __lt__(self, other) -> bool: | ||
| return self.value < other.value | ||
| def __lt__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is less than the second operand. | ||
| def __le__(self, other) -> bool: | ||
| return self.value <= other.value | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is less than the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| return self.value < other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
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||
| def __le__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is less or equal than the second operand. | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is less or equal than the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| return self.value <= other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
|
||
| def __gt__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is greater than the second operand. | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is greater than the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| return self.value > other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
|
||
| def __ge__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is greater or equal than the second operand. | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is greater or equal than the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| return self.value >= other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
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||
| def __ne__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is unequal to the second operand. | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is unequal to the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| return self.value != other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
|
||
| def __eq__(self, other: Any) -> bool: | ||
| """ | ||
| Compare two (System)Verilog versions if the version is equal to the second operand. | ||
| :param other: Parameter to compare against. | ||
| :returns: True if version is equal to the second operand. | ||
| :raises TypeError: If parameter ``other`` is not of type :class:`SystemVerilogVersion`. | ||
| """ | ||
| if isinstance(other, SystemVerilogVersion): | ||
| if (self is self.__class__.Any) or (other is self.__class__.Any): | ||
| return True | ||
| else: | ||
| return self.value == other.value | ||
| else: | ||
| raise TypeError("Second operand is not of type 'SystemVerilogVersion'.") | ||
|
|
||
| def __gt__(self, other) -> bool: | ||
| return self.value > other.value | ||
| @property | ||
| def IsVerilog(self) -> bool: | ||
| """ | ||
| Checks if the version is a (classic) Verilog version. | ||
| def __ge__(self, other) -> bool: | ||
| return self.value >= other.value | ||
| :returns: True if version is a (classic) Verilog version. | ||
| """ | ||
| return self in (self.Verilog95, self.Verilog2001, self.Verilog2005) | ||
|
|
||
| def __ne__(self, other) -> bool: | ||
| return self.value != other.value | ||
| @property | ||
| def IsSystemVerilog(self) -> bool: | ||
| """ | ||
| Checks if the version is a SystemVerilog version. | ||
| def __eq__(self, other) -> bool: | ||
| if (self is self.__class__.Any) or (other is self.__class__.Any): | ||
| return True | ||
| else: | ||
| return self.value == other.value | ||
| :returns: True if version is a SystemVerilog version. | ||
| """ | ||
| return self in (self.SystemVerilog2005, self.SystemVerilog2009, self.SystemVerilog2012, self.SystemVerilog2017) | ||
|
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||
| def __str__(self) -> str: | ||
| if self.value == -1: | ||
| """ | ||
| Formats the SystemVerilog version to pattern ``SV'xx`` or in case of classic Verilog to ``Verilog'xx``. | ||
| :return: Formatted (System)Verilog version. | ||
| """ | ||
| if self.value == self.Any.value: | ||
| return "SV'Any" | ||
| elif self.value < self.SystemVerilog2005.value: | ||
| return "Verilog'" + str(self.value)[-2:] | ||
| if self.value == self.Latest.value: | ||
| return "SV'Latest" | ||
|
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| year = str(self.value)[-2:] | ||
| if self.value < self.SystemVerilog2005.value: | ||
| return f"Verilog'{year}" | ||
| else: | ||
| return "SV'" + str(self.value)[-2:] | ||
| return f"SV'{year}" | ||
|
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||
| def __repr__(self) -> str: | ||
| if self.value == -1: | ||
| """ | ||
| Formats the (System)Verilog version to pattern ``xxxx``. | ||
| :return: Formatted (System)Verilog version. | ||
| """ | ||
| if self.value == self.Any.value: | ||
| return "Any" | ||
| elif self.value == self.Latest.value: | ||
| return "Latest" | ||
| else: | ||
| return str(self.value) | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,12 +1,13 @@ | ||
| -r ../requirements.txt | ||
|
|
||
| # Coverage collection | ||
| Coverage>=7.0 | ||
| Coverage >= 7.3 | ||
|
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| # Test Runner | ||
| pytest>=7.2.0 | ||
| pytest-cov>=4.0.0 | ||
| pytest >= 7.4.0 | ||
| pytest-cov >= 4.1.0 | ||
|
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||
| # Static Type Checking | ||
| mypy >= 1.2 | ||
| mypy >= 1.5 | ||
| typing_extensions >= 4.7.1 | ||
| lxml>=4.9 |