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Merge remote-tracking branch 'shenandoah/master' into merge-jdk-22+20
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earthling-amzn committed Oct 20, 2023
2 parents 6fc3514 + ac30d48 commit de29536
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4 changes: 2 additions & 2 deletions .jcheck/conf
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
[general]
project=jdk
project=shenandoah
jbs=JDK
version=22

Expand All @@ -22,7 +22,7 @@ ignore-tabs=.*\.gmk|Makefile
message=Merge

[checks "reviewers"]
reviewers=1
committers=1
ignore=duke

[checks "committer"]
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
* Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -88,10 +89,21 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LI
LIR_Opr result = gen->new_register(T_INT);

__ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));

if (ShenandoahCardBarrier) {
post_barrier(access, access.resolved_addr(), new_value.result());
}
return result;
}
}
return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);

LIR_Opr result = BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);

if (ShenandoahCardBarrier && access.is_oop()) {
post_barrier(access, access.resolved_addr(), new_value.result());
}

return result;
}

LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
Expand Down Expand Up @@ -119,6 +131,9 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRIt
pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
result /* pre_val */);
}
if (ShenandoahCardBarrier) {
post_barrier(access, access.resolved_addr(), result);
}
}

return result;
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
* Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -31,6 +32,7 @@
#include "gc/shenandoah/shenandoahRuntime.hpp"
#include "gc/shenandoah/shenandoahThreadLocalData.hpp"
#include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
#include "gc/shenandoah/mode/shenandoahMode.hpp"
#include "interpreter/interpreter.hpp"
#include "interpreter/interp_masm.hpp"
#include "runtime/javaThread.hpp"
Expand Down Expand Up @@ -77,6 +79,13 @@ void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, Dec
}
}

void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
Register start, Register count, Register tmp, RegSet saved_regs) {
if (ShenandoahCardBarrier && is_oop) {
gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp, saved_regs);
}
}

void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
Register obj,
Register pre_val,
Expand Down Expand Up @@ -375,6 +384,26 @@ void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet d
}
}

void ShenandoahBarrierSetAssembler::store_check(MacroAssembler* masm, Register obj) {
assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");

__ lsr(obj, obj, CardTable::card_shift());

assert(CardTable::dirty_card_val() == 0, "must be");

__ load_byte_map_base(rscratch1);

if (UseCondCardMark) {
Label L_already_dirty;
__ ldrb(rscratch2, Address(obj, rscratch1));
__ cbz(rscratch2, L_already_dirty);
__ strb(zr, Address(obj, rscratch1));
__ bind(L_already_dirty);
} else {
__ strb(zr, Address(obj, rscratch1));
}
}

void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
bool on_oop = is_reference_type(type);
Expand Down Expand Up @@ -411,6 +440,9 @@ void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet
__ mov(new_val, val);
}
BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
if (ShenandoahCardBarrier) {
store_check(masm, r3);
}
}

}
Expand Down Expand Up @@ -595,6 +627,35 @@ void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
}
}

void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
Register start, Register count, Register scratch, RegSet saved_regs) {
assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");

Label L_loop, L_done;
const Register end = count;

// Zero count? Nothing to do.
__ cbz(count, L_done);

// end = start + count << LogBytesPerHeapOop
// last element address to make inclusive
__ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
__ sub(end, end, BytesPerHeapOop);
__ lsr(start, start, CardTable::card_shift());
__ lsr(end, end, CardTable::card_shift());

// number of bytes to copy
__ sub(count, end, start);

__ load_byte_map_base(scratch);
__ add(start, start, scratch);
__ bind(L_loop);
__ strb(zr, Address(start, count));
__ subs(count, count, 1);
__ br(Assembler::GE, L_loop);
__ bind(L_done);
}

#undef __

#ifdef COMPILER1
Expand Down
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
* Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -55,10 +56,16 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
bool tosca_live,
bool expand_call);

void store_check(MacroAssembler* masm, Register obj);

void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);

void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
Register start, Register count,
Register scratch, RegSet saved_regs);

public:

void iu_barrier(MacroAssembler* masm, Register dst, Register tmp);
Expand All @@ -74,6 +81,8 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {

virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
Register src, Register dst, Register count, RegSet saved_regs);
virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
Register start, Register count, Register tmp, RegSet saved_regs);
virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Address src, Register tmp1, Register tmp2);
virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Expand Down
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
* Copyright (c) 2012, 2021 SAP SE. All rights reserved.
* Copyright (c) 2012, 2022 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -104,6 +104,10 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess &access, LI

__ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));

if (ShenandoahCardBarrier) {
post_barrier(access, access.resolved_addr(), new_value.result());
}

if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
__ membar_acquire();
} else {
Expand All @@ -114,7 +118,13 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess &access, LI
}
}

return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
LIR_Opr result = BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);

if (ShenandoahCardBarrier && access.is_oop()) {
post_barrier(access, access.resolved_addr(), new_value.result());
}

return result;
}

LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess &access, LIRItem &value) {
Expand Down Expand Up @@ -150,6 +160,10 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess &access, LIRIt
if (ShenandoahSATBBarrier) {
pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, result);
}

if (ShenandoahCardBarrier) {
post_barrier(access, access.resolved_addr(), result);
}
}

if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
Expand Down
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
* Copyright (c) 2012, 2021 SAP SE. All rights reserved.
* Copyright (c) 2012, 2022 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -37,6 +37,7 @@
#include "gc/shenandoah/shenandoahRuntime.hpp"
#include "gc/shenandoah/shenandoahThreadLocalData.hpp"
#include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
#include "gc/shenandoah/mode/shenandoahMode.hpp"
#include "interpreter/interpreter.hpp"
#include "runtime/javaThread.hpp"
#include "runtime/sharedRuntime.hpp"
Expand Down Expand Up @@ -90,8 +91,6 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler *masm,
void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler *masm, DecoratorSet decorators, BasicType type,
Register src, Register dst, Register count,
Register preserve1, Register preserve2) {
__ block_comment("arraycopy_prologue (shenandoahgc) {");

Register R11_tmp = R11_scratch1;

assert_different_registers(src, dst, count, R11_tmp, noreg);
Expand All @@ -114,6 +113,7 @@ void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler *masm, Dec
return;
}

__ block_comment("arraycopy_prologue (shenandoahgc) {");
Label skip_prologue;

// Fast path: Array is of length zero.
Expand Down Expand Up @@ -187,6 +187,16 @@ void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler *masm, Dec
__ block_comment("} arraycopy_prologue (shenandoahgc)");
}

void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Register count,
Register preserve) {
if (ShenandoahCardBarrier && is_reference_type(type)) {
__ block_comment("arraycopy_epilogue (shenandoahgc) {");
gen_write_ref_array_post_barrier(masm, decorators, dst, count, preserve);
__ block_comment("} arraycopy_epilogue (shenandoahgc)");
}
}

// The to-be-enqueued value can either be determined
// - dynamically by passing the reference's address information (load mode) or
// - statically by passing a register the value is stored in (preloaded mode)
Expand Down Expand Up @@ -586,6 +596,25 @@ void ShenandoahBarrierSetAssembler::load_at(
}
}

void ShenandoahBarrierSetAssembler::store_check(MacroAssembler* masm, Register base, RegisterOrConstant ind_or_offs, Register tmp) {
assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");

ShenandoahBarrierSet* ctbs = ShenandoahBarrierSet::barrier_set();
CardTable* ct = ctbs->card_table();
assert_different_registers(base, tmp, R0);

if (ind_or_offs.is_constant()) {
__ add_const_optimized(base, base, ind_or_offs.as_constant(), tmp);
} else {
__ add(base, ind_or_offs.as_register(), base);
}

__ load_const_optimized(tmp, (address)ct->byte_map_base(), R0);
__ srdi(base, base, CardTable::card_shift());
__ li(R0, CardTable::dirty_card_val());
__ stbx(R0, tmp, base);
}

// base: Base register of the reference's address.
// ind_or_offs: Index or offset of the reference's address.
// val: To-be-stored value/reference's new value.
Expand All @@ -608,6 +637,11 @@ void ShenandoahBarrierSetAssembler::store_at(MacroAssembler *masm, DecoratorSet
val,
tmp1, tmp2, tmp3,
preservation_level);

// No need for post barrier if storing NULL
if (ShenandoahCardBarrier && is_reference_type(type) && val != noreg) {
store_check(masm, base, ind_or_offs, tmp1);
}
}

void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler *masm,
Expand Down Expand Up @@ -757,6 +791,40 @@ void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler *masm, Register b
__ block_comment("} cmpxchg_oop (shenandoahgc)");
}

void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
Register addr, Register count, Register preserve) {
assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");

ShenandoahBarrierSet* bs = ShenandoahBarrierSet::barrier_set();
CardTable* ct = bs->card_table();
assert_different_registers(addr, count, R0);

Label L_skip_loop, L_store_loop;

__ sldi_(count, count, LogBytesPerHeapOop);

// Zero length? Skip.
__ beq(CCR0, L_skip_loop);

__ addi(count, count, -BytesPerHeapOop);
__ add(count, addr, count);
// Use two shifts to clear out those low order two bits! (Cannot opt. into 1.)
__ srdi(addr, addr, CardTable::card_shift());
__ srdi(count, count, CardTable::card_shift());
__ subf(count, addr, count);
__ add_const_optimized(addr, addr, (address)ct->byte_map_base(), R0);
__ addi(count, count, 1);
__ li(R0, 0);
__ mtctr(count);

// Byte store loop
__ bind(L_store_loop);
__ stb(R0, 0, addr);
__ addi(addr, addr, 1);
__ bdnz(L_store_loop);
__ bind(L_skip_loop);
}

#undef __

#ifdef COMPILER1
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,10 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
Register tmp1, Register tmp2,
MacroAssembler::PreservationLevel preservation_level);

void store_check(MacroAssembler* masm,
Register base, RegisterOrConstant ind_or_offs,
Register tmp);

void load_reference_barrier_impl(MacroAssembler* masm, DecoratorSet decorators,
Register base, RegisterOrConstant ind_or_offs,
Register dst,
Expand All @@ -60,6 +64,10 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
/* ==== Helper methods for barrier implementations ==== */
void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp);

void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
Register addr, Register count,
Register preserve);

public:
virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_data_patch; }

Expand Down Expand Up @@ -100,7 +108,11 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {

/* ==== Access api ==== */
virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register src, Register dst, Register count, Register preserve1, Register preserve2);
Register src, Register dst, Register count,
Register preserve1, Register preserve2);
virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register dst, Register count,
Register preserve);

virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
Register base, RegisterOrConstant ind_or_offs, Register val,
Expand Down
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