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Update ISA documentation #4

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7b3d3b4
Add more links to ISA readme
dthaler Sep 22, 2022
71c9076
Update ISA documentation
dthaler Aug 29, 2022
b424eb0
Move legacy packet instructions to linux historical notes
dthaler Sep 13, 2022
d6c2740
Feedback from Shung-Hsi Yu
dthaler Sep 14, 2022
874fb82
Add note about invalid instruction 0x8d used by clang -O0
dthaler Sep 14, 2022
31e6a1c
Add src column to Appendix table
dthaler Sep 14, 2022
22b3a5b
Fix construction of imm64
dthaler Sep 14, 2022
712a32d
Add additional 0x18 opcodes by src value
dthaler Sep 14, 2022
bfb4831
Minor cleanup
dthaler Sep 16, 2022
f831770
Specify modulo with negative numbers
dthaler Sep 16, 2022
508e6fd
Address feedback from Quentin
dthaler Sep 21, 2022
ae38325
Add extended call instructions
dthaler Sep 21, 2022
33c190f
Move all Linux implementation notes to a separate document
dthaler Sep 21, 2022
b80f558
Move Clang notes to a separate document
dthaler Sep 21, 2022
0f30bc1
Redo versioning to just state the latest version is v1.0
dthaler Sep 21, 2022
d230335
Add note about documentation conventions
dthaler Sep 21, 2022
6e145d2
Fix asterisk escaping
dthaler Sep 22, 2022
794b4fd
Fix jump opcode table format
dthaler Sep 22, 2022
96a8094
Fix Appendix rows for opcode 0x18
dthaler Sep 22, 2022
b786e45
Fix modulo 0 result
dthaler Sep 22, 2022
ef22d47
Fix 4-bit code field values in tables
dthaler Sep 23, 2022
d491049
Fix URL
dthaler Sep 23, 2022
3b9470a
Fix definition of modulo
dthaler Sep 24, 2022
5bd09ab
Fix formatting
dthaler Sep 25, 2022
847b1cd
Fix typo
dthaler Nov 18, 2022
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Fix asterisk escaping
Signed-off-by: Dave Thaler <[email protected]>
dthaler committed Sep 23, 2022
commit 6e145d289c068039d81a1700cc1d7ac533bf8697
30 changes: 15 additions & 15 deletions isa/kernel.org/instruction-set.rst
Original file line number Diff line number Diff line change
@@ -364,22 +364,22 @@ Regular load and store operations
The ``BPF_MEM`` mode modifier is used to encode regular load and store
instructions that transfer data between a register and memory.

============================= ========= ==================================
============================= ========= ====================================
opcode construction opcode pseudocode
============================= ========= ==================================
BPF_MEM | BPF_B | BPF_LDX 0x71 dst = *(uint8_t *) (src + offset)
BPF_MEM | BPF_H | BPF_LDX 0x69 dst = *(uint16_t *) (src + offset)
BPF_MEM | BPF_W | BPF_LDX 0x61 dst = *(uint32_t *) (src + offset)
BPF_MEM | BPF_DW | BPF_LDX 0x79 dst = *(uint64_t *) (src + offset)
BPF_MEM | BPF_B | BPF_ST 0x72 *(uint8_t *) (dst + offset) = imm
BPF_MEM | BPF_H | BPF_ST 0x6a *(uint16_t *) (dst + offset) = imm
BPF_MEM | BPF_W | BPF_ST 0x62 *(uint32_t *) (dst + offset) = imm
BPF_MEM | BPF_DW | BPF_ST 0x7a *(uint64_t *) (dst + offset) = imm
BPF_MEM | BPF_B | BPF_STX 0x73 *(uint8_t *) (dst + offset) = src
BPF_MEM | BPF_H | BPF_STX 0x6b *(uint16_t *) (dst + offset) = src
BPF_MEM | BPF_W | BPF_STX 0x63 *(uint32_t *) (dst + offset) = src
BPF_MEM | BPF_DW | BPF_STX 0x7b *(uint64_t *) (dst + offset) = src
============================= ========= ==================================
============================= ========= ====================================
BPF_MEM | BPF_B | BPF_LDX 0x71 dst = \*(uint8_t \*) (src + offset)
BPF_MEM | BPF_H | BPF_LDX 0x69 dst = \*(uint16_t \*) (src + offset)
BPF_MEM | BPF_W | BPF_LDX 0x61 dst = \*(uint32_t \*) (src + offset)
BPF_MEM | BPF_DW | BPF_LDX 0x79 dst = \*(uint64_t \*) (src + offset)
BPF_MEM | BPF_B | BPF_ST 0x72 \*(uint8_t \*) (dst + offset) = imm
BPF_MEM | BPF_H | BPF_ST 0x6a \*(uint16_t \*) (dst + offset) = imm
BPF_MEM | BPF_W | BPF_ST 0x62 \*(uint32_t \*) (dst + offset) = imm
BPF_MEM | BPF_DW | BPF_ST 0x7a \*(uint64_t \*) (dst + offset) = imm
BPF_MEM | BPF_B | BPF_STX 0x73 \*(uint8_t \*) (dst + offset) = src
BPF_MEM | BPF_H | BPF_STX 0x6b \*(uint16_t \*) (dst + offset) = src
BPF_MEM | BPF_W | BPF_STX 0x63 \*(uint32_t \*) (dst + offset) = src
BPF_MEM | BPF_DW | BPF_STX 0x7b \*(uint64_t \*) (dst + offset) = src
============================= ========= ====================================

Atomic operations
-----------------