Firmware for CAN-controlled PWM controller.
- PCB:
pwm_node_pcb
.
Table of Contents
Manufacturer Part Number | Manufacturer | Description | Quantity | Notes |
---|---|---|---|---|
STM32L432KC | STMicroelectronics | 32-bit MCU | 1 | |
TJA1051T/3 | NXP USA Inc. | CAN Bus Transceiver | 1 |
Drawio file here: pwm_node.drawio.
Pin & Peripherals Table
STM32L432KC | Peripheral | Config | Connection | Notes |
---|---|---|---|---|
PB3 | SYS_JTDO-SWO |
TC2050 SWD Pin 6: SWO |
||
PA14 | SYS_JTCK-SWCLK |
TC2050 SWD Pin 4: SWCLK |
||
PA13 | SYS_JTMS-SWDIO |
TC2050 SWD Pin 2: SWDIO |
||
PA11 | CAN1_RX |
TJA1051T/3 Pin 1: TXD |
||
PA12 | CAN1_TX |
TJA1051T/3 Pin 4: RXD |
||
PA5 | TIM2_CH1 |
PWM Generation CH1 | Breakout | |
PA1 | TIM2_CH2 |
PWM Generation CH2 | Breakout | |
PA2 | TIM2_CH3 |
PWM Generation CH3 | Breakout | |
PA3 | TIM2_CH4 |
PWM Generation CH4 | Breakout | |
PB7 | USART1_RX |
TBD | ||
PB6 | USART1_TX |
TBD | ||
PA9 | I2C1_SCL |
TBD | ||
PA10 | I2C1_SDA |
TBD |
8 MHz High Speed External (HSE)
↓
Phase-Locked Loop Main (PLLM)
↓
80 MHz SYSCLK
↓
80 MHz HCLK
↓
→ 80 MHz APB1 (Maxed) → 80 MHz APB1 Timer
→ 80 MHz APB2 (Maxed) → 80 MHz APB2 Timer
Carry over from nerve.
APB2
: 80 MHz (clock for TIM2 PWM output channels).
Given the PWM equation:
-
$f_{TIM} = 1 \space \mathrm{MHz}$ - Choosing 1 MHz (1 µs per tick) to simplify calculations.
-
$ARR = 20000 - 1$ - Counter period, aka Auto Reload Register (ARR) of 19999 is used to simplify the translation of 1 ms and 2 ms pulse widths.
-
$f_{PWM} = 1 \space \mathrm{MHz}$ - Aiming for 1 µs ticks, or
$1 \times 10 ^{-6} \space \mathrm{s}$ . - Calculating for required PWM frequency:
$f_{PWM} = \frac{1}{1 \times 10 ^{-6} \space \mathrm{s}} = 1 \space \mathrm{MHz}$
- Aiming for 1 µs ticks, or
Thus, the prescaler,
With these settings the following PWM values can be obtained:
1 ms -> CCR = 1000
1.5 ms -> CCR = 1500
2 ms -> CCR = 2000
TIM2_UP
DMA1 Stream2
:
- Direction:
Memory to Peripheral
. - Mode:
Circular
.- Application is PWM servos.
- Peripheral Increment Address:
Disabled
. - Memory Increment Address:
Enabled
. - (Both Peripheral and Memory) Data Width:
Word
. - Use FIFO:
Disabled
.