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feat: [EXAM] quizes #49

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2 changes: 1 addition & 1 deletion .vscode/settings.json
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"latex-workshop.synctex.afterBuild.enabled": true,
"latex-workshop.view.pdf.viewer": "tab",
"latex-workshop.latex.build.forceRecipeUsage": false,
"latex-workshop.latex.search.rootFiles.include": ["**/courses/5/main.tex"], // Change this to the path of your main tex file
"latex-workshop.latex.search.rootFiles.include": ["**/instructionset/main.tex"], // Change this to the path of your main tex file
"latex-workshop.view.pdf.internal.synctex.keybinding": "double-click",
"latex-workshop.latex.autoClean.run": "onBuilt",
"latex-workshop.latex.autoBuild.run": "onSave",
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3 changes: 3 additions & 0 deletions assignments/exam/.gitignore
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plantuml
out/*
out
41 changes: 19 additions & 22 deletions assignments/exam/README.md
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## 1

## 2
1. Given the following hexadecimal number 0xhex in big endian format, convert it to binary and decimal.
1. Given the following hexadecimal number 0xhex in big endian format, convert it to binary.

2. Given the hexadecimal string 0xhex, what is the value of the
2. Given the following hexadecimal number 0xhex in big endian format, convert it to decimal.

3. Given the hexadecimal string 0xhex, what is the value of the
number in the X NRS (number representation system)?

## 3

3. Calculate the number of bits for the tag, index, and block offset
4. Calculate the number of bits for the tag, index, and block offset
for a cache memory with the following characteristics: X cache size, Y
block placement, and Z block size.
block placement, and Z block size. The address size will be given.

4. What happens to CPU execution time if we increase the block size to
5. What happens to CPU execution time if we increase the block size to
reduce the miss rate?

5. What happens to CPU execution time if we increase the cache size to
6. What happens to CPU execution time if we increase the cache size to
reduce the miss rate?

6. What happens to CPU execution time if we increase the associativity
7. What happens to CPU execution time if we increase the associativity
to reduce the miss rate?

7. What happens to CPU execution time if we add multiple levels of
8. What happens to CPU execution time if we add multiple levels of
cache?

## 4

8. Given the x-bit adder of type y, calculate the number of gates
9. Given the x-bit adder of type y, calculate the number of gates
for the carry-out.

9. Given the x-bit Booth's algorithm, how many additions are for
10. Given the x-bit Booth's algorithm, how many additions are for
M x R?

10. What are the status flags for the following operation X ?
11. What are the status flags for the following operation X ?

## 5

11. Having the following registers value, main memory address and
12. Having the following registers value, main memory address and
data, and the immediate value what is the value of the MA register if we
use the X addressing mode?

12. Having the memory addressing table and instruction format
tables, what is the instruction conding for the X operation?

13. Having the memory addressing table and instruction format
tables, what is the instruction encoding in hexadecimal for the X operation?

14. Having the memory addressing table and instruction format
tables, what is the instruction for the IR = x?

## 6

## 7

14. Having the following IO registers value, main memory address
15. Having the following IO registers value, main memory address
and data, what can you find on the data bus?

15. Having the X UART configuration, what is the maxim data rate
16. Having the X UART configuration, what is the maxim data rate
that can be achieved?

## 8

16. Having the following values in the registers at time 0, interrupts
requested with the time of the request and the type of the interrupt, and
how much time the CPU will take to handle every type of interrupt, which
is the order of the interrupts that will be handled by the CPU?

17. Having the following values in the registers at time 0, interrupts
requested with the time of the request and the type of the interrupt, and
how much time the CPU will take to handle every type of interrupt, which
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70 changes: 70 additions & 0 deletions assignments/exam/addertype/fetch.py
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import sys, json, random, datetime
args = {param.split('=')[0]: param.split('=')[1] for param in sys.argv[1:]}
student_id = args['id']
# TODO: change for EXAM
secret = 0
week=datetime.datetime.now().isocalendar()[0]
random.seed(secret + week + int(student_id))

def calculate_no_gates_ripple_carry_adder(n, order):
return n * 5

def calculate_no_gates_kogge_stone_adder(n, order):
return n * 3 + 3 * n * order - 3 * n + 3

def calculate_no_gates_brent_kung_adder(n, order):
return n * 3 + 6 * n - 6 - 3 * order

def path_carry_out_ripple_carry_adder(n, order):
return n * 3

def path_carry_out_kogge_stone_adder(n, order):
return 2 * order + 1

def path_carry_out_brent_kung_adder(n, order):
return 2 * order + 1

# Define the possible values for the number of bits
order_of_bits = [x for x in range(4, 5, 6)]
adder_types = ['ripple-carry adder', 'kogge-stone CLA', 'brent-kung CLA']
question_types = ['gates', 'carry-out path']
questions = ['How many gates are in a {}-bit {}?', 'How many gates are in the carry-out path are in a {}-bit {}?']
selected_order_of_bits = random.choice(order_of_bits)
selected_adder_type = random.choice(adder_types)
selected_no_bits = 2 ** selected_order_of_bits
selected_question_type = random.choice(question_types)

answer = 0

if selected_question_type == 'gates':
if selected_adder_type == 'ripple-carry adder':
answer = calculate_no_gates_ripple_carry_adder(selected_no_bits, selected_order_of_bits)
elif selected_adder_type == 'kogge-stone CLA':
answer = calculate_no_gates_kogge_stone_adder(selected_no_bits, selected_order_of_bits)
elif selected_adder_type == 'brent-kung CLA':
answer = calculate_no_gates_brent_kung_adder(selected_no_bits, selected_order_of_bits)
elif selected_question_type == 'carry-out path':
if selected_adder_type == 'ripple-carry adder':
answer = path_carry_out_ripple_carry_adder(selected_no_bits, selected_order_of_bits)
elif selected_adder_type == 'kogge-stone CLA':
answer = path_carry_out_kogge_stone_adder(selected_no_bits, selected_order_of_bits)
elif selected_adder_type == 'brent-kung CLA':
answer = path_carry_out_brent_kung_adder(selected_no_bits, selected_order_of_bits)

question = questions[question_types.index(selected_question_type)].format(selected_no_bits, selected_adder_type)

# transform in a html format question
question = """
<div>
<p>{}</p>
</div>
""".format(question)

print(
json.dumps(
{
'question': question,
'result': answer
}
)
)
130 changes: 130 additions & 0 deletions assignments/exam/addertype/sol.tex
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\subsection*{Problem}
Given the X-bit adder of type Y, calculate the total number of gates and
the number of gates on the path to the carry out. Y can be:
\begin{itemize}
\item Ripple Carry Adder
\item Carry Lookahead Kogge-Stone
\item Carry Lookahead Brent-Kung
\end{itemize}

\subsection*{Solution}
Let's calculate the total number of gates and the number of gates on the path to the carry out for each type of 32-bit adder.

\textbf{Ripple Carry Adder}

In a ripple carry adder, each bit addition requires a full adder, which consists of:
\begin{itemize}
\item 2 XOR gates for sum
\item 2 AND gates and 1 OR gate for carry-out
\end{itemize}
For a 32-bit adder:
\[
\text{Total gates} = 32 \times (2 \text{ XOR} + 2 \text{ AND} + 1 \text{ OR}) = 32 \times 5 = 160 \text{ gates}
\]
The number of gates on the path to the carry out is:
\[
\text{Gates on carry-out path} = 32 \times (2 \text{ AND} + 1 \text{ OR}) = 32 \times 3 = 96 \text{ gates}
\]

\textbf{Carry Lookahead Adder (CLA)}

Each bit in the adder generates two signals:
\begin{itemize}
\item Generate signal: \( G_i = A_i \land B_i \) (AND gate per bit)
\item Propagate signal: \( P_i = A_i \oplus B_i \) (XOR gate per bit)
\end{itemize}

For an \( n \)-bit adder, this requires:
\[
n \times \text{AND gates} + n \times \text{XOR gates}.
\]

The sum is computed using:
\[
S_i = P_i \oplus C_i.
\]

This requires:
\[
n \times \text{XOR gates}.
\]

The carry equation is given by:
\[
C_{i+1} = G_i \lor (P_i \land C_i).
\]


\textbf{Kogge-Stone CLA:}
The Kogge-Stone adder is a parallel prefix adder with a highly regular structure, providing optimal computation for propagate ($P$) and generate ($G$) signals in $\lceil \log_2 n \rceil$ levels.

The total number of gates in the Kogge-Stone CLA depends on:
\begin{itemize}
\item \textbf{Propagation of $P$ and $G$:}
At each level $k$, the $P$ and $G$ values are computed using:
\[
G_i^{(k)} = G_i^{(k-1)} \lor \left(P_i^{(k-1)} \land G_{i-2^{k-1}}^{(k-1)}\right),
\]
\[
P_i^{(k)} = P_i^{(k-1)} \land P_{i-2^{k-1}}^{(k-1)}.
\]
This requires:
\begin{itemize}
\item \textbf{1 AND gate} for $P_i^{(k)}$.
\item \textbf{1 AND gate and 1 OR gate} for $G_i^{(k)}$.
\end{itemize}
\item The number of operations at each level is $n - 2^{k-1}$.
\end{itemize}

The carry-out path in a Kogge-Stone adder corresponds to the depth of the tree, which is $\lceil \log_2 n \rceil$. At each level:
\begin{itemize}
\item \textbf{1 AND gate} for propagate ($P$).
\item \textbf{1 AND gate and 1 OR gate} for generate ($G$).
\end{itemize}
This results in \textbf{3 gates per level}.

For an \( n \)-bit adder, the total number of carry gates is approximately:
\begin{equation*}
\begin{split}
\text{Carry Gates} & = \sum_{i=1}^{\log_2 n} \left( n - 2^{i-1} \right) \times 3 = 3 \times n \times \sum_{i=1}^{\log_2 n} 1 - 3 \times \sum_{i=1}^{\log_2 n} 2^{i-1} = \\
& = 3 \times n \times \log_2 n - 3 \times \left( 2^{\log_2 n} - 1 \right) = \\
& = 3 \times n \times \log_2 n - 3 \times (n - 1) = \\
& = 3 \times n \times \log_2 n - 3 \times n + 3. \\
& = 3 \times 32 \times 5 - 3 \times 32 + 3 = 480 - 96 + 3 = 387 \text{ gates}. \\
\text{Total gates} & = n + n + n + 387 = 3 \times 32 + 387 = 96 + 387 = 483 \text{ gates}. \\
\text{Carry-out path} & = 2 \times \lceil \log_2 n \rceil + 1 = 2 \times 5 + 1 = 11 \text{ gates}.
\end{split}
\end{equation*}

\textbf{Brent-Kung CLA:}
The Brent-Kung adder is another form of parallel prefix adder with a different structure than Kogge-Stone.
It keeps the same number of gates for the carry-out path, but the total number of gates is different and depth is $2 \log_2 n - 1$.
It has a tree structure with a depth of $\log_2 n$ to compute the carry signals followed by a depth of $\log_2 n$ to compute the sum.
For the first $\log_2 n$ levels:
\begin{itemize}
\item \textbf{1 AND gate} for $P_i^{(k)}$.
\item \textbf{1 AND gate and 1 OR gate} for $G_i^{(k)}$.
\item The number of operations at each level is $ \frac{n}{2^{k}}$.
\end{itemize}
For the next $\log_2 n - 1$ levels:
\begin{itemize}
\item \textbf{1 AND gate} for $P_i^{(k)}$.
\item \textbf{1 AND gate and 1 OR gate} for $G_i^{(k)}$.
\item The number of operations at each level is $\frac{n}{2^{k}} - 1$.
\end{itemize}

The total number of gates in the Brent-Kung CLA is:
\begin{equation*}
\begin{split}
\text{Carry Gates} & = \sum_{i=1}^{\log_2 n} \left( \frac{n}{2^{i}} \right) \times 3 + \sum_{i=1}^{\log_2 n - 1} \left( \frac{n}{2^{i}} - 1 \right) \times 3 = \\
& = 3 \times n \times \sum_{i=1}^{\log_2 n} \frac{1}{2^{i}} + 3 \times \sum_{i=1}^{\log_2 n - 1} \left( \frac{n}{2^{i}} - 1 \right) = \\
& = 3 \times n \times \left( 1 - \frac{1}{2^{\log_2 n}} \right) + 3 \times \left( n \times \sum_{i=1}^{\log_2 n - 1} \frac{1}{2^{i}} - \sum_{i=1}^{\log_2 n - 1} 1 \right) = \\
& = 3 \times n \times \left( 1 - \frac{1}{n} \right) + 3 \times \left( n \times \left( 1 - \frac{1}{2^{\log_2 n - 1}} \right) - \left( \log_2 n - 1 \right) \right) = \\
& = 3 \times n - 3 + 3 \times n \times \left( 1 - \frac{2}{n} \right) - 3 \times \left( \log_2 n - 1 \right) = \\
& = 3 \times n - 3 + 3 \times n - 6 - 3 \times \log_2 n + 3 = \\
& = 6 \times n - 6 - 3 \times \log_2 n = \\
& = 6 \times 32 - 6 - 3 \times 5 = 192 - 6 - 15 = 171 \text{ gates}. \\
\text{Total gates} & = n + n + n + 171 = 3 \times 32 + 171 = 96 + 171 = 267 \text{ gates}. \\
\text{Carry-out path} & = 2 \times \log_2 n + 1 = 2 \times 5 + 1 = 11 \text{ gates}.
\end{split}
\end{equation*}
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