Merge pull request #511 from msft-jlange/cpuid_xcr0

igvmbuilder: configure XCR0 as expected in CPUID tables
coconut-svsm · Nov 11, 2024 · 3c2c37f · 3c2c37f
2 parents b158a49 + 5e64c55
commit 3c2c37f
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Showing 2 changed files with 15 additions and 19 deletions.
diff --git a/igvmbuilder/src/cpuid.rs b/igvmbuilder/src/cpuid.rs
@@ -27,24 +27,18 @@ struct SnpCpuidLeaf {
 
 impl SnpCpuidLeaf {
     pub fn new1(eax_in: u32) -> Self {
-        Self {
-            eax_in,
-            ecx_in: 0,
-            xcr0: 0,
-            xss: 0,
-            eax_out: 0,
-            ebx_out: 0,
-            ecx_out: 0,
-            edx_out: 0,
-            reserved: 0,
-        }
+        Self::new2(eax_in, 0)
     }
 
     pub fn new2(eax_in: u32, ecx_in: u32) -> Self {
+        Self::new3(eax_in, ecx_in, 0)
+    }
+
+    pub fn new3(eax_in: u32, ecx_in: u32, xcr0: u64) -> Self {
         Self {
             eax_in,
             ecx_in,
-            xcr0: 0,
+            xcr0,
             xss: 0,
             eax_out: 0,
             ebx_out: 0,
@@ -92,8 +86,8 @@ impl SnpCpuidPage {
         cpuid_page.add(SnpCpuidLeaf::new2(7, 1))?;
         cpuid_page.add(SnpCpuidLeaf::new1(11))?;
         cpuid_page.add(SnpCpuidLeaf::new2(11, 1))?;
-        cpuid_page.add(SnpCpuidLeaf::new1(13))?;
-        cpuid_page.add(SnpCpuidLeaf::new2(13, 1))?;
+        cpuid_page.add(SnpCpuidLeaf::new3(13, 0, 1))?;
+        cpuid_page.add(SnpCpuidLeaf::new3(13, 1, 1))?;
         cpuid_page.add(SnpCpuidLeaf::new1(0x80000000))?;
         cpuid_page.add(SnpCpuidLeaf::new1(0x80000001))?;
         cpuid_page.add(SnpCpuidLeaf::new1(0x80000002))?;

diff --git a/kernel/src/cpu/sse.rs b/kernel/src/cpu/sse.rs
@@ -31,7 +31,7 @@ fn legacy_sse_enable() {
 }
 
 fn extended_sse_supported() -> bool {
-    let res = CpuidResult::get(0xD, 1);
+    let res = CpuidResult::get(0xD, 0);
     (res.eax & 0x7) == 0x7
 }
 
@@ -40,6 +40,11 @@ fn xsave_supported() -> bool {
     (res.ecx & (1 << CPUID_ECX_XSAVE)) != 0
 }
 
+fn xsaveopt_supported() -> bool {
+    let res = CpuidResult::get(0xD, 1);
+    (res.eax & (1 << CPUID_EAX_XSAVEOPT)) != 0
+}
+
 fn xcr0_set() {
     unsafe {
         // set bits [0-2] in XCR0 to enable extended SSE
@@ -50,14 +55,11 @@ fn xcr0_set() {
 
 pub fn get_xsave_area_size() -> u32 {
     let res = CpuidResult::get(0xD, 0);
-    if (res.eax & (1 << CPUID_EAX_XSAVEOPT)) == 0 {
-        panic!("XSAVEOPT unsupported");
-    }
     res.ecx
 }
 
 fn extended_sse_enable() {
-    if extended_sse_supported() && xsave_supported() {
+    if extended_sse_supported() && xsave_supported() && xsaveopt_supported() {
         cr4_xsave_enable();
         xcr0_set();
     } else {