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Correcetly simulate passed time before first clock edge in verilator #335

Correcetly simulate passed time before first clock edge in verilator

Correcetly simulate passed time before first clock edge in verilator #335

license-check

succeeded Jan 10, 2025 in 13s
Set up job
1s
Build fsfe/reuse-action@v4
5s
Initialize containers
1s
Run actions/checkout@v4
1s
REUSE Compliance Check
0s
Post Run actions/checkout@v4
0s
Stop containers
0s
Complete job
0s