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SGMII core: resolve problems with packet transmission #22

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jvnknvlgl
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This is a draft PR to resolve problems with packet transmission of the SGMII core. I will use this to track progress and mark observations.

Current actions:

  • Discovered problem with packet transmission on hardware: some octets of the preamble are missing, and two extra empty (zero) octets are added before the /T/ and /R/ sequence indicating the end of a packet.
  • Reproduced the issue in simulation: with the same input on TXD as in hardware, the issue can be reproduced in simulation.

Observations:

  • While normally the preamble of an ethernet packet should be 7 times 0x55, the intended output of the PCS transmit should only contain 6 times 0x55 as the start-of-packet code group /S/ is replaced with 0x55 at the PCS receive.
  • If TX_EN is asserted while the PCS receive code group process is in IDLE_DISPARITY_WRONG or IDLE_DISPARITY_OK, another octet of the preamble is missing as the system still needs to move through IDLE_IB.

Possible solution: add a queue for values coming from TXD that gets emptied when TX_OSET.indicate is issued, regardless of what the value of TX_EN is? This is thought-in-process.

@DigitalBrains1
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I just manually made CI run, in basically the same manner that we use kloonbot on clash-compiler, except just by hand without a bot. I thought it might be useful to you.

@jvnknvlgl
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After some discussion with @lmbollen, we think that the best solution would be to add a component at the input of the PcsTransmit block that:

  • Holds the incoming data in a register if the PcsTransmit is still halfway through sending an idle,
  • Makes sure the incoming data is delayed such that nothing from the preamble is lost due to state transitions.

This should, as far as we can see, be compatible with the standard. To make sure that this does not affect EXTEND-states, a new test should be added to verify this.

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