v0.6.4

christiaanb released this 12 Nov 12:07

· 4832 commits to master since this release

a5d3986

Fixes bugs:
- Reversing alternatives is not meaning preserving for literal patterns #91
- DEC: root of the case-tree must contain at least 2 alternatives #92
- Do not generate overlapping literal patterns in VHDL #91

Assets 2