v0.6.11
- New features:
- Add support for HDL synthesis tool specific HDL generation:
- New
-clash-hdlsyn Vivado
flag to generate HDL tweaked for Xilinx Vivado
- New
- Preserve more Haskell names in generated HDL #128
- Add support for HDL synthesis tool specific HDL generation:
- Fixes bugs:
- VHDL: Vivado fails to infer block ram #127
- Users must use the
-clash-hdlsyn Vivado
flag in order to generate Xilinx Vivado specific HDL for which Vivado can infer block RAM.
- Users must use the
- VHDL: Vivado fails to infer block ram #127