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Issues list

We should update contact links in README
#2894 opened Feb 16, 2025 by DigitalBrains1
1
1
Quartus SystemVerilog: error on input port typedef and net type
#2855 opened Dec 16, 2024 by DigitalBrains1
1
Clash.Intel.DDR: Quartus Verilog errors on uselib macro
#2854 opened Dec 14, 2024 by DigitalBrains1
Xilinx DDR output: Haskell model wrong for Enable
#2840 opened Nov 6, 2024 by DigitalBrains1
3
tuple3_0_sel0_std_logic_vector is not declared
#2807 opened Sep 7, 2024 by DigitalBrains1
Unmatchable constant as case subject
#2806 opened Sep 7, 2024 by DigitalBrains1
CI: Need better way to run all tests
#2785 opened Aug 9, 2024 by DigitalBrains1
Warn for insufficient OPAQUE annotations bug
#2653 opened Jan 31, 2024 by DigitalBrains1
1
Two undocumented command line flags documentation
#2642 opened Jan 16, 2024 by DigitalBrains1
We should document OPAQUE for primitives documentation
#2632 opened Dec 22, 2023 by DigitalBrains1
Example of a primitive in tutorial is outdated documentation
#2631 opened Dec 21, 2023 by DigitalBrains1
1
Can't put synthesis attribute on output tuple
#2594 opened Oct 25, 2023 by DigitalBrains1
top_component.ports_flat: wrong VHDL type names for clk, rst, en bug
#2480 opened May 24, 2023 by DigitalBrains1
clash-lib-hedgehog: weird Haddock warning external bug
#2462 opened Apr 29, 2023 by DigitalBrains1
derivePackedAnnotation creates bogus bit representations bug
#2401 opened Jan 11, 2023 by DigitalBrains1
3
Suggestion: deduplication table enhancement
#2368 opened Dec 1, 2022 by DigitalBrains1
Port names in Synthesize annotations should be acccounted for in unique name generation bug
#2246 opened Jun 17, 2022 by DigitalBrains1
1
assert HDL does not use Eq bug
#2245 opened Jun 17, 2022 by DigitalBrains1
Test bench needs INLINE when passing down top entity
#2196 opened May 8, 2022 by DigitalBrains1
1
Some warnings should not be suppressed for test benches
#2170 opened Apr 14, 2022 by DigitalBrains1
1
Memories and Vec: better exceptions enhancement
#2051 opened Jan 25, 2022 by DigitalBrains1
2
Template Haskell does not preserve transfinite floating point values bug external bug
#1812 opened May 17, 2021 by DigitalBrains1
2
Custom BitRep and derive Enum don't mesh bug
#1795 opened May 1, 2021 by DigitalBrains1
1
Blackbox alternative: specify Clash code for synthesis enhancement
#1720 opened Mar 24, 2021 by DigitalBrains1
SatSymmetric Signed computations include minBound as a result
#1460 opened Jul 21, 2020 by DigitalBrains1
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