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Combinatorial => combinational (#2874)
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martijnbastiaan authored Feb 3, 2025
1 parent d9e2a53 commit 0376420
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2 changes: 1 addition & 1 deletion CHANGELOG.md
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Expand Up @@ -284,7 +284,7 @@ Fixed:
* Don't overflow the range of VHDL's natural type in shift/rotate, leading to simulation issues. Shift now saturates to a 31-bit shift amount. For rotate, in simulation only, the rotate amount is modulo the word width of the rotated value [#1874](https://github.com/clash-lang/clash-compiler/pull/1874)
* `shiftL` for Clash datatypes does not cause a crash anymore when running Clash code with a really large shift amount [#1874](https://github.com/clash-lang/clash-compiler/pull/1874)
* VHDL generated for `Signed.fromInteger` now truncates, like the Clash simulation, when the result is smaller than the argument [#1874](https://github.com/clash-lang/clash-compiler/pull/1874)
* Clash now preserves boolean combinatorial logic better when generating HDL [#1881](https://github.com/clash-lang/clash-compiler/issues/1881)
* Clash now preserves boolean combinational logic better when generating HDL [#1881](https://github.com/clash-lang/clash-compiler/issues/1881)
* `valid` field of `TemplateFunction` is now checked for includes [#1945](https://github.com/clash-lang/clash-compiler/issues/1945)
* Clash now generates clock generators that ensure that the amount of time between simulation start and the first active edge of the clock is equal to (/or longer than/) the period of the clock. The first active edges of the clocks do still occur simultaneously. [#2001](https://github.com/clash-lang/clash-compiler/issues/2001)
* Expected values in assert become undefined when using `-fclash-compile-ultra` [#2040](https://github.com/clash-lang/clash-compiler/issues/2040)
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2 changes: 1 addition & 1 deletion clash-cores/src/Clash/Cores/Xilinx/Xpm/Cdc/Pulse.hs
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Expand Up @@ -77,7 +77,7 @@ data XpmCdcPulseConfig stages = XpmCdcPulseConfig
-- calls @INIT_SYNC_FF@.
, initialValues :: Bool

-- | Register output. Makes sure the combinatorial logic in @XPM_CDC_PULSE@
-- | Register output. Makes sure the combinational logic in @XPM_CDC_PULSE@
-- doesn't contribute to any user critical paths.
, registerOutput :: Bool
-- This is what [PG382](https://docs.xilinx.com/r/en-US/pg382-xpm-cdc-generator/XPM_CDC_HANDSHAKE)
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2 changes: 1 addition & 1 deletion clash-prelude/src/Clash/Explicit/Signal/Delayed.hs
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Expand Up @@ -233,7 +233,7 @@ delayI dflt = delayN (SNat :: SNat d) dflt
data DelayedFold (dom :: Domain) (n :: Nat) (delay :: Nat) (a :: Type) (f :: TyFun Nat Type) :: Type
type instance Apply (DelayedFold dom n delay a) k = DSignal dom (n + (delay*k)) a

-- | Tree fold over a 'Vec' of 'DSignal's with a combinatorial function,
-- | Tree fold over a 'Vec' of 'DSignal's with a combinational function,
-- and delaying @delay@ cycles after each application.
-- Values at times 0..(delay*k)-1 are set to a default.
--
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2 changes: 1 addition & 1 deletion clash-prelude/src/Clash/Signal/Delayed.hs
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Expand Up @@ -190,7 +190,7 @@ delayI
-> DSignal dom (n+d) a
delayI dflt = hideClock (hideEnable (E.delayI dflt))

-- | Tree fold over a 'Vec' of 'DSignal's with a combinatorial function,
-- | Tree fold over a 'Vec' of 'DSignal's with a combinational function,
-- and delaying @delay@ cycles after each application.
-- Values at times 0..(delay*k)-1 are set to a default.
--
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20 changes: 10 additions & 10 deletions clash-prelude/src/Clash/Signal/Internal.hs
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Expand Up @@ -1228,7 +1228,7 @@ resetPolarityProxy _proxy =
--
-- * <Clash-Explicit-Signal.html#metastability meta-stability>
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1248,7 +1248,7 @@ unsafeToActiveHigh (unsafeFromReset -> r) =
--
-- * <Clash-Explicit-Signal.html#metastability meta-stability>
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1266,7 +1266,7 @@ unsafeToHighPolarity = unsafeToActiveHigh
--
-- * <Clash-Explicit-Signal.html#metastability meta-stability>
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1286,7 +1286,7 @@ unsafeToActiveLow (unsafeFromReset -> r) =
--
-- * <Clash-Explicit-Signal.html#metastability meta-stability>
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1303,7 +1303,7 @@ unsafeToLowPolarity = unsafeToActiveLow
--
-- * <Clash-Explicit-Signal.html#metastability meta-stability>
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1319,7 +1319,7 @@ unsafeFromReset (Reset r) = r
{-# ANN unsafeFromReset hasBlackBox #-}

-- | 'unsafeToReset' is unsafe. For asynchronous resets it is unsafe
-- because it can introduce combinatorial loops. In case of synchronous resets
-- because it can introduce combinational loops. In case of synchronous resets
-- it can lead to <Clash-Explicit-Signal.html#metastability meta-stability>
-- issues in the presence of asynchronous resets.
--
Expand All @@ -1337,7 +1337,7 @@ unsafeToReset r = Reset r
-- | Interpret a signal of bools as an active high reset and convert it to
-- a reset signal corresponding to the domain's setting.
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1354,7 +1354,7 @@ unsafeFromHighPolarity = unsafeFromActiveHigh
-- | Interpret a signal of bools as an active high reset and convert it to
-- a reset signal corresponding to the domain's setting.
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1373,7 +1373,7 @@ unsafeFromActiveHigh r =
-- | Interpret a signal of bools as an active low reset and convert it to
-- a reset signal corresponding to the domain's setting.
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
Expand All @@ -1390,7 +1390,7 @@ unsafeFromLowPolarity = unsafeFromActiveLow
-- | Interpret a signal of bools as an active low reset and convert it to
-- a reset signal corresponding to the domain's setting.
--
-- For asynchronous resets it is unsafe because it can cause combinatorial
-- For asynchronous resets it is unsafe because it can cause combinational
-- loops. In case of synchronous resets it can lead to
-- <Clash-Explicit-Signal.html#metastability meta-stability> in the presence of
-- asynchronous resets.
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3 changes: 1 addition & 2 deletions docs/general/intro.rst
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Expand Up @@ -35,7 +35,7 @@ Expressive
expressiveness to hardware design.

This expressive typing makes it easier to develop safe, maintainable
hardware. Combinatorial and sequential logic is separated by type, and global
hardware. Combinational and sequential logic is separated by type, and global
safety invariants such as separating incompatible clock domains are enforced
in the type system.

Expand Down Expand Up @@ -131,4 +131,3 @@ which versions are compatible.

It is recommended (but not required) that downstream Clash packages and
published Clash code also follow the PVP specification.

11 changes: 5 additions & 6 deletions docs/getting-started/first-circuit.rst
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Expand Up @@ -3,7 +3,7 @@
Example: Multiply and Accumulate
================================

Combinatorial MAC
Combinational MAC
-----------------

With Clash installed, it is now possible to begin creating hardware designs.
Expand Down Expand Up @@ -43,7 +43,7 @@ Synchronous MAC

By adding another output parameter to this function, with the previous value of
the accumulator, we can define the function as a `Mealy machine`_. This allows
us to use our combinatorial definition of ``mac`` to create a synchronous
us to use our combinational definition of ``mac`` to create a synchronous
circuit (which we call ``macS``).

.. code-block:: haskell
Expand All @@ -57,7 +57,7 @@ circuit (which we call ``macS``).
.. _`Mealy machine`: https://en.wikipedia.org/wiki/Mealy_machine

The input and output of ``macS`` are values of the ``Signal`` type. This type
represents synchronous values (functions without signals are combinatorial).
represents synchronous values (functions without signals are combinational).
There is also an additional ``dom`` type, for synthesis domain, and a
constraint ``HiddenClockResetEnable`` -- which says the synthesis domain has a
clock, reset and enable line. These are implicit, although they can be exposed
Expand Down Expand Up @@ -91,7 +91,7 @@ will generate the HDL in a subdirectory named after the HDL being output.
means there can be no type variables in the type signature (i.e. for the
circuit defined so far you need to specify both ``dom`` and ``a``.

We can test that this circuit works as expected by defining a test bench.
We can test that this circuit works as expected by defining a test bench.
This allows an input to be used and the actual output to be compared against
an expected output.

Expand All @@ -112,7 +112,6 @@ function, which takes in the number of samples to draw and the signal which
generates samples.

.. code-block:: haskell
>>> sampleN 8 testBench
[False, False, False, False, False, False, False, False]

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