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Releases: chipsalliance/firrtl-spec

v2.0.0

16 Mar 16:53
v2.0.0
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v2.0.0 Release

The following features are added:

  - Constant types
  - Reference types and related statements (e.g., Probe)

The following features are removed:

  - Fixed point types
  - The validif expression
  - The partial connect statement

v1.2.0

02 Mar 01:01
v1.2.0
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v1.2.0 Release

This is a synthetic release created from batched changes accumulated
while building the 2.0.0 release.  This is intended to be a version that
is approximately compatible with the FIRRTL emitted by Chisel 3.6.

v1.1.0

11 Aug 17:30
v1.1.0
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v1.1.0 Release

- Add version info to FIRRTL files
- Explicitly say that FIRRTL is 2-state

v1.0.0

03 Aug 22:20
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v1.0.0 Release

Officially switch to SemVer and reset to 1.0.0

v0.4.0

01 Jul 16:51
v0.4.0
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v 0.4.0 Release

This version adds documentation for some long-undocumented features of
the Scala-based FIRRTL Compiler (SFC) that are de facto a part of the
FIRRTL specification due to their widespread use in Chisel and the SFC:

  1. Annotations
  2. Targets
  3. Asynchronous Reset
  4. Abstract Reset

There are also minor typo corrections and prose clarifications.

v0.3.1

10 Mar 22:56
v0.3.1
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v0.3.1 Release

- Fix missing commas in multi-line types
- Clarify analog usage in registers
- Rework authorship as "The FIRRTL Specification Contributors"
- Add version information as subtitle

v0.3.0

04 Mar 23:35
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Bump Spec Version to 0.3.0

Increment the version of the spec to 0.3.0.  This number is entirely
arbitrary other than it is higher than 0.2.0 and indicates that there
have been substantial updates/improvements to the spec since 0.2.0 was
cut in 2016.

Signed-off-by: Schuyler Eldridge <[email protected]>