soc_ifc_ctrl_interface.yaml

uvmf:
  interfaces:
    soc_ifc_ctrl:
      clock: clk
      reset: dummy
      reset_assertion_level: 'False'

      config_constraints: []
      config_vars: []

      hdl_typedefs: []
      hvl_typedefs: []

#      parameters:
#      - name: AHB_ADDR_WIDTH
#        type: int
#        value: '32'
#      - name: AHB_DATA_WIDTH
#        type: int
#        value: '32'

      ports:
#      # Clock
#      - name: clk
#        dir: output
#        width: '1'
      #SoC boot signals
      - name: cptra_pwrgood
        dir: output
        width: '1'
      - name: cptra_rst_b
        dir: output
        width: '1'

      #Obfuscated UDS and FE
      - name: cptra_obf_key
        dir: output
        width: ["`CLP_OBF_KEY_DWORDS","32"]

      # Security State
      - name: security_state
        dir: output
        width: '3'

      # Breakpoint
      - name: BootFSM_BrkPoint
        dir: output
        width: '1'

      # Generic
      - name: generic_input_wires
        dir: output
        width: '64'

      transaction_constraints:
      - name: wait_cycles_c
        value: '{ wait_cycles dist {[1:25] := 80, [25:100] := 15, [100:500] := 5}; }'
      - name: generic_tie_zero_c
        value: "{ generic_input_val == 64'h0; }"
      - name: device_lifecycle_const_c
        value: "{ if (device_lifecycle_set_static) {security_state.device_lifecycle == device_lifecycle_static; } }"

      transaction_vars:
      - name: cptra_obf_key_rand
        type: bit [`CLP_OBF_KEY_DWORDS-1:0] [31:0]
        iscompare: 'True'
        isrand: 'True'
      - name: set_pwrgood
        type: bit
        iscompare: 'False'
        isrand: 'False'
      - name: assert_rst
        type: bit
        iscompare: 'False'
        isrand: 'False'
      - name: wait_cycles
        type: 'int unsigned'
        iscompare: 'False'
        isrand: 'True'
      - name: security_state
        type: security_state_t
        iscompare: 'False'
        isrand: 'True'
      - name: set_bootfsm_breakpoint
        type: bit
        iscompare: 'False'
        isrand: 'True'
      - name: generic_input_val
        type: bit [63:0]
        iscompare: 'False'
        isrand: 'True'
    cptra_ctrl:
      clock: clk
      reset: dummy
      reset_assertion_level: 'False'

      config_constraints: []
      config_vars: []

      hdl_typedefs: []
      hvl_typedefs: []

      ports:
      - name: clear_obf_secrets
        dir: output
        width: '1'

      - name: iccm_axs_blocked
        dir: output
        width: '1'

      - name: rv_ecc_sts
        dir: output
        width: '4'

      transaction_constraints: []

      transaction_vars:
      - name: assert_clear_secrets
        type: bit
        iscompare: 'False'
        isrand: 'False'
      - name: iccm_axs_blocked
        type: bit
        iscompare: 'False'
        isrand: 'False'
      - name: pulse_rv_ecc_error
        type: rv_ecc_sts_t
        iscompare: 'False'
        isrand: 'False'