adc完了割り込みでの動作に変更

chama1176 · Aug 29, 2024 · 9802aa2 · 9802aa2
1 parent 85c2218
commit 9802aa2
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Showing 3 changed files with 38 additions and 12 deletions.
diff --git a/.cargo/config.toml b/.cargo/config.toml
@@ -14,6 +14,8 @@ runner = [
   "STM32G431RBTx",
   "--log-format",
   "{L} {s}",
+  "--probe",
+  "0483:374f",
 ]
 # runner = "gdb-multiarch -q -x openocd.gdb"
 # runner = "gdb -q -x openocd.gdb"

diff --git a/src/bldc_motor_driver_stm32g4.rs b/src/bldc_motor_driver_stm32g4.rs
@@ -93,7 +93,7 @@ pub fn clock_init(perip: &Peripherals, core_perip: &mut CorePeripherals) {
     tim6.cr2.modify(|_, w| unsafe { w.mms().bits(0b010) });
 }
 
-pub fn dma_init(perip: &Peripherals) {
+pub fn dma_init(perip: &Peripherals, core_perip: &mut CorePeripherals) {
 
     let address = free(|cs| G_ADC_DATA.borrow(cs).borrow().as_ptr() as u32);
 
@@ -121,7 +121,7 @@ pub fn dma_init(perip: &Peripherals) {
     perip.DMA1.ccr1.modify(|_, w| w.dir().clear_bit()); // read from peripheral
     perip.DMA1.ccr1.modify(|_, w| w.teie().clear_bit()); // transfer error interrupt enable
     perip.DMA1.ccr1.modify(|_, w| w.htie().clear_bit()); // half transfer interrupt enable
-    perip.DMA1.ccr1.modify(|_, w| w.tcie().clear_bit()); // transfer complete interrupt enable
+    perip.DMA1.ccr1.modify(|_, w| w.tcie().set_bit()); // transfer complete interrupt enable
 
     // For category 2 devices:
     // • DMAMUX channels 0 to 5 are connected to DMA1 channels 1 to 6
@@ -147,12 +147,10 @@ pub fn dma_init(perip: &Peripherals) {
         .modify(|_, w| unsafe { w.ma().bits(address) }); // memory address
 
     // 割り込み設定
-    // unsafe{
-    //     core_perip.NVIC.set_priority(Interrupt::DMA1_CH1, 0);
-    //     NVIC::unmask(Interrupt::DMA1_CH1);
-    //     core_perip.NVIC.set_priority(Interrupt::ADC1_2, 0);
-    //     NVIC::unmask(Interrupt::ADC1_2);
-    // }
+    unsafe{
+        core_perip.NVIC.set_priority(Interrupt::DMA1_CH1, 0);
+        NVIC::unmask(Interrupt::DMA1_CH1);
+    }
 }
 
 pub fn adc2_init(perip: &Peripherals) {

diff --git a/src/main.rs b/src/main.rs
@@ -13,7 +13,7 @@ use cortex_m_rt::entry;
 
 use stm32g4::stm32g431;
 use stm32g4::stm32g431::interrupt;
-use stm32g4::stm32g431::Interrupt::TIM3; // you can put a breakpoint on `rust_begin_unwind` to catch panics
+use stm32g4::stm32g431::Interrupt::{TIM3, DMA1_CH1}; // you can put a breakpoint on `rust_begin_unwind` to catch panics
                                          // use panic_abort as _; // requires nightly
                                          // use panic_itm as _; // logs messages over ITM; requires ITM support
                                          // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger
@@ -43,8 +43,9 @@ static G_APP: Mutex<
 > = Mutex::new(RefCell::new(None));
 
 
+
 #[interrupt]
-fn TIM3() {
+fn DMA1_CH1(){
     static mut TIM3_COUNT: u32 = 0;
     // `TIM3_COUNT` has type `&mut u32` and it's safe to use
     *TIM3_COUNT += 1;
@@ -57,7 +58,14 @@ fn TIM3() {
         {
             None => (),
             Some(perip) => {
-                perip.TIM3.sr.modify(|_, w| w.uif().clear_bit());
+                if perip.DMA1.isr.read().tcif1().bit_is_set() {
+                    perip.DMA1.ifcr.write(|w| w.tcif1().set_bit());
+                }else{
+                    // 想定と違う割り込み要因
+                    defmt::error!("Something went wrong!");
+                    perip.DMA1.ifcr.write(|w| w.gif1().set_bit());
+                    return;
+                }
             }
         }
         match G_APP.borrow(cs).borrow_mut().deref_mut() {
@@ -68,6 +76,24 @@ fn TIM3() {
             }
         }
     });
+
+}
+
+#[interrupt]
+fn TIM3() {
+
+    free(|cs| {
+        match bldc_motor_driver_stm32g4::G_PERIPHERAL
+            .borrow(cs)
+            .borrow()
+            .as_ref()
+        {
+            None => (),
+            Some(perip) => {
+                perip.TIM3.sr.modify(|_, w| w.uif().clear_bit());
+            }
+        }
+    });
 }
 
 defmt::timestamp!("{=u32:us}", {
@@ -98,7 +124,7 @@ fn main() -> ! {
     bldc_motor_driver_stm32g4::clock_init(&perip, &mut core_perip);
     bldc_motor_driver_stm32g4::adc2_init(&perip);
 
-    bldc_motor_driver_stm32g4::dma_init(&perip);
+    bldc_motor_driver_stm32g4::dma_init(&perip, &mut core_perip);
     bldc_motor_driver_stm32g4::dma_adc2_start(&perip);
 
     bldc_motor_driver_stm32g4::init_g_peripheral(perip);