[Cider 2] fud2 fixes (#2140)

* rename `interp-flat` to `cider` * fix the current tests * now you can run with flags * janky fix to disable logging by default for cider * janky fix to disable logging by default for cider * Fix the snapshots
calyxir · Jun 12, 2024 · 2439f79 · 2439f79
1 parent 484d09f
commit 2439f79
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Showing 13 changed files with 73 additions and 10 deletions.
diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs
@@ -25,6 +25,14 @@ fn setup_calyx(
             "calyx-pass",
             "$calyx-exe -l $calyx-base -p $pass $args $in > $out",
         )?;
+
+        e.config_var_or("flags", "calyx.flags", "-p none")?;
+
+        e.rule(
+            "calyx-with-flags",
+            "$calyx-exe -l $calyx-base $flags $args $in > $out",
+        )?;
+
         Ok(())
     });
     bld.op(
@@ -500,6 +508,9 @@ pub fn build_driver(bld: &mut DriverBuilder) {
 
     // Interpreter.
     let debug = bld.state("debug", &[]); // A pseudo-state.
+                                         // A pseudo-state for cider input
+    let cider_state = bld.state("cider", &[]);
+
     let cider_setup = bld.setup("Cider interpreter", |e| {
         e.config_var_or(
             "cider-exe",
@@ -537,7 +548,7 @@ pub fn build_driver(bld: &mut DriverBuilder) {
         )?;
 
         e.rule(
-            "cider2",
+            "run-cider",
             "$cider-exe -l $calyx-base --data data.dump $in flat > $out",
         )?;
 
@@ -552,6 +563,22 @@ pub fn build_driver(bld: &mut DriverBuilder) {
 
         Ok(())
     });
+    bld.op(
+        "calyx-to-cider",
+        &[sim_setup, calyx_setup],
+        calyx,
+        cider_state,
+        |e, input, _output| {
+            e.build_cmd(
+                &["cider-input.futil"],
+                "calyx-with-flags",
+                &[input],
+                &[],
+            )?;
+            Ok(())
+        },
+    );
+
     bld.op(
         "interp",
         &[
@@ -575,13 +602,18 @@ pub fn build_driver(bld: &mut DriverBuilder) {
         },
     );
     bld.op(
-        "interp-flat",
+        "cider",
         &[sim_setup, calyx_setup, cider_setup],
-        calyx,
+        cider_state,
         dat,
-        |e, input, output| {
+        |e, _input, output| {
             let out_file = "interp_out.dump";
-            e.build_cmd(&[out_file], "cider2", &[input], &["data.dump"])?;
+            e.build_cmd(
+                &[out_file],
+                "run-cider",
+                &["cider-input.futil"],
+                &["data.dump"],
+            )?;
             e.build_cmd(
                 &[output],
                 "interp-to-dump",

diff --git a/fud2/tests/snapshots/tests__emit@calyx_debug.snap b/fud2/tests/snapshots/tests__emit@calyx_debug.snap
@@ -31,6 +31,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # Cider interpreter
 cider-exe = $calyx-base/target/debug/cider
@@ -47,7 +50,7 @@ rule dat-to-interp
 rule interp-to-dat
   command = $python interp-dat.py --from-interp $in $sim_data > $out
 build data.json: dat-to-interp $sim_data | interp-dat.py
-rule cider2
+rule run-cider
   command = $cider-exe -l $calyx-base --data data.dump $in flat > $out
 rule dump-to-interp
   command = $cider-converter --to cider $in > $out

diff --git a/fud2/tests/snapshots/tests__emit@calyx_firrtl_verilog-refmem.snap b/fud2/tests/snapshots/tests__emit@calyx_firrtl_verilog-refmem.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # Custom Testbench Setup
 rule ref-to-external

diff --git a/fud2/tests/snapshots/tests__emit@calyx_icarus_dat.snap b/fud2/tests/snapshots/tests__emit@calyx_icarus_dat.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # RTL simulation
 python = python3

diff --git a/fud2/tests/snapshots/tests__emit@calyx_icarus_vcd.snap b/fud2/tests/snapshots/tests__emit@calyx_icarus_vcd.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # RTL simulation
 python = python3

diff --git a/fud2/tests/snapshots/tests__emit@calyx_interp_dat.snap b/fud2/tests/snapshots/tests__emit@calyx_interp_dat.snap
@@ -31,6 +31,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # Cider interpreter
 cider-exe = $calyx-base/target/debug/cider
@@ -47,7 +50,7 @@ rule dat-to-interp
 rule interp-to-dat
   command = $python interp-dat.py --from-interp $in $sim_data > $out
 build data.json: dat-to-interp $sim_data | interp-dat.py
-rule cider2
+rule run-cider
   command = $cider-exe -l $calyx-base --data data.dump $in flat > $out
 rule dump-to-interp
   command = $cider-converter --to cider $in > $out

diff --git a/fud2/tests/snapshots/tests__emit@calyx_verilator_dat.snap b/fud2/tests/snapshots/tests__emit@calyx_verilator_dat.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # RTL simulation
 python = python3

diff --git a/fud2/tests/snapshots/tests__emit@calyx_verilator_vcd.snap b/fud2/tests/snapshots/tests__emit@calyx_verilator_vcd.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # RTL simulation
 python = python3

diff --git a/fud2/tests/snapshots/tests__emit@calyx_verilog.snap b/fud2/tests/snapshots/tests__emit@calyx_verilog.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # build targets
 build stdin.sv: calyx stdin

diff --git a/fud2/tests/snapshots/tests__emit@calyx_xrt-trace_vcd.snap b/fud2/tests/snapshots/tests__emit@calyx_xrt-trace_vcd.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # Xilinx tools
 vivado-dir = /test/xilinx/vivado

diff --git a/fud2/tests/snapshots/tests__emit@calyx_xrt_dat.snap b/fud2/tests/snapshots/tests__emit@calyx_xrt_dat.snap
@@ -14,6 +14,9 @@ rule calyx
   command = $calyx-exe -l $calyx-base -b $backend $args $in > $out
 rule calyx-pass
   command = $calyx-exe -l $calyx-base -p $pass $args $in > $out
+flags = -p none
+rule calyx-with-flags
+  command = $calyx-exe -l $calyx-base $flags $args $in > $out
 
 # Xilinx tools
 vivado-dir = /test/xilinx/vivado

diff --git a/interp/cider2-tests/runt.toml b/interp/cider2-tests/runt.toml
@@ -67,7 +67,7 @@ expect_dir = "control"
 name = "invoke"
 paths = ["../tests/control/invoke/*.futil"]
 cmd = """
-fud2 {} --from calyx --to dat --through interp-flat -s sim.data={}.data | jq --sort-keys
+fud2 {} --from calyx --to dat --through cider -s sim.data={}.data -s calyx.args="--log off" | jq --sort-keys
 """
 timeout = 10
 expect_dir = "invoke"
@@ -106,8 +106,9 @@ name = "correctness dynamic"
 paths = ["../../tests/correctness/*.futil"]
 cmd = """
 fud2 --from calyx --to dat \
-         --through interp-flat \
+         --through cider \
          -s sim.data={}.data \
+         -s calyx.args="--log off" \
          {} | jq --sort-keys
 """
 

diff --git a/interp/src/flatten/structures/environment/env.rs b/interp/src/flatten/structures/environment/env.rs
@@ -1296,7 +1296,7 @@ impl<'a> Simulator<'a> {
 
                             has_changed |= changed.as_bool();
                         } else if self.env.ports[dest].is_def() {
-                            todo!("Raise an error here since this assignment is undefining things: {}", self.env.ctx.printer().print_assignment(ledger.comp_id, assign_idx))
+                            todo!("Raise an error here since this assignment is undefining things: {}. Port currently has value: {}", self.env.ctx.printer().print_assignment(ledger.comp_id, assign_idx), &self.env.ports[dest])
                         }
                     }
                 }