Skip to content

Bump Tasty to 1.5 #7209

Bump Tasty to 1.5

Bump Tasty to 1.5 #7209

Re-run triggered March 4, 2025 17:08
Status Success
Total duration 11m 27s
Artifacts 13

ci.yml

on: push
Build dependencies
6m 24s
Build dependencies
bittide-instances hardware-in-the-loop test matrix generation
25s
bittide-instances hardware-in-the-loop test matrix generation
bittide-instances synthesis matrix generation
25s
bittide-instances synthesis matrix generation
license-check
9s
license-check
Basic linting
1m 17s
Basic linting
bittide-experiments unittests
1m 8s
bittide-experiments unittests
Bittide tests
6m 21s
Bittide tests
Rust Lints
37s
Rust Lints
Firmware Support Unit Tests
2m 0s
Firmware Support Unit Tests
Firmware Limit Checks
1m 1s
Firmware Limit Checks
bittide-instances doctests
1m 1s
bittide-instances doctests
bittide-instances unittests
1m 41s
bittide-instances unittests
Matrix: synth
Matrix: HITL
Generate clock control report
1m 41s
Generate clock control report
All jobs finished
2s
All jobs finished
Fit to window
Zoom out
Zoom in

Annotations

2 warnings
HITL (transceiversUpTest, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.
HITL (linkConfigurationTest, test)
No files were found with the provided path: _build/vivado/*/ila-data _build/hitl/*. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size
CC-HITLT Plot Sources
2.64 MB
Clock Control Reports
369 KB
_build-swCcOneTopologyTest-debug
26.7 MB
_build-vexRiscvTcpTest-debug
93.8 KB
_build-vexRiscvTest-debug
203 KB