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Add user words to transceiver input/output (simulation only) #7202

Add user words to transceiver input/output (simulation only)

Add user words to transceiver input/output (simulation only) #7202

Triggered via push March 4, 2025 15:30
Status Cancelled
Total duration 18m 49s
Artifacts 3

ci.yml

on: push
Build dependencies
6m 43s
Build dependencies
bittide-instances hardware-in-the-loop test matrix generation
24s
bittide-instances hardware-in-the-loop test matrix generation
bittide-instances synthesis matrix generation
17s
bittide-instances synthesis matrix generation
license-check
17s
license-check
Basic linting
1m 8s
Basic linting
bittide-experiments unittests
52s
bittide-experiments unittests
Bittide tests
7m 29s
Bittide tests
Rust Lints
46s
Rust Lints
Firmware Support Unit Tests
2m 57s
Firmware Support Unit Tests
Firmware Limit Checks
42s
Firmware Limit Checks
bittide-instances doctests
51s
bittide-instances doctests
bittide-instances unittests
2m 28s
bittide-instances unittests
Matrix: synth
Matrix: HITL
Generate clock control report
0s
Generate clock control report
All jobs finished
0s
All jobs finished
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Annotations

7 errors
Basic linting
Process completed with exit code 1.
synth (transceiversUpTest, test)
The run was canceled by @martijnbastiaan.
synth (transceiversUpTest, test)
The operation was canceled.
synth (swCcOneTopologyTest, test)
The run was canceled by @martijnbastiaan.
synth (swCcOneTopologyTest, test)
The operation was canceled.
synth (linkConfigurationTest, test)
The run was canceled by @martijnbastiaan.
synth (linkConfigurationTest, test)
The operation was canceled.

Artifacts

Produced during runtime
Name Size
_build-safeDffSynchronizer
2.59 KB
_build-vexRiscvTcpTest
44.2 MB
_build-vexRiscvTest
40.2 MB