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CI #7168

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CI #7168

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Job Run time
bittide-instances hardware-in-the-loop test matrix generation
17s
license-check
17s
Build dependencies
2m 34s
bittide-instances synthesis matrix generation
23s
Basic linting
1m 3s
Rust Lints
36s
Bittide tests
7m 4s
bittide-experiments unittests
1m 42s
Firmware Limit Checks
2m 7s
bittide-instances doctests
1m 37s
Firmware Support Unit Tests
2m 23s
bittide-instances unittests
1m 43s
synth (counterReducedPins, pnr)
4m 10s
synth (elasticBuffer5, pnr)
3m 20s
synth (gatherUnit1K, hdl)
1m 59s
synth (gatherUnit1KReducedPins, pnr)
4m 47s
synth (safeDffSynchronizer, pnr)
4m 8s
synth (scatterUnit1K, hdl)
1m 34s
synth (scatterUnit1KReducedPins, pnr)
4m 42s
synth (si5391Spi, pnr)
5m 30s
synth (stabilityChecker_3_1M, pnr)
3m 12s
synth (switchCalendar1k, hdl)
4m 15s
synth (switchCalendar1kReducedPins, pnr)
5m 13s
synth (boardTestExtended, test)
5m 29s
synth (boardTestSimple, test)
4m 38s
synth (dnaOverSerial, test)
5m 33s
synth (fincFdecTests, test)
6m 48s
synth (swCcTopologyTest, test)
19m 14s
synth (linkConfigurationTest, test)
14m 7s
synth (syncInSyncOut, test)
4m 59s
synth (temperatureMonitor, test)
5m 49s
synth (transceiversUpTest, test)
13m 45s
synth (vexRiscvTest, test)
7m 53s
synth (vexRiscvTcpTest, test)
8m 6s
HITL (boardTestExtended, test)
1m 55s
HITL (boardTestSimple, test)
1m 35s
HITL (dnaOverSerial, test)
1m 35s
HITL (fincFdecTests, test)
1m 18s
HITL (swCcTopologyTest, test)
14m 35s
HITL (linkConfigurationTest, test)
1m 40s
HITL (syncInSyncOut, test)
1m 35s
HITL (temperatureMonitor, test)
1m 42s
HITL (transceiversUpTest, test)
2m 20s
HITL (vexRiscvTest, test)
1m 23s
HITL (vexRiscvTcpTest, test)
1m 50s
Generate clock control report
2m 16s
All jobs finished
6s
3h 14m 47s