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Remove dead tail code from (non-SHA3) AES-GCM AArch64 kernel (#1639)
On AArch64 systems without support for EOR3, assembly kernels `aes_gcm_enc_kernel` and `aes_gcm_dec_kernel` from `aesv8-gcm-armv8.pl` are used for the bulk of AES-GCM processing. These kernels have dedicated tail code for handling inputs whose size is not a multiple of the block size (16 bytes). However, the unique call-sites for `aes_gcm_enc_kernel` and `aes_gcm_dec_kernel` in `gcm.c` only invoke them with data of size a multiple of 16 bytes: See the masking here [here](https://github.com/aws/aws-lc/blob/98735a2f6723ba984a18b2f79e05173a61e0f869/crypto/fipsmodule/modes/gcm.c#L154) and [here](https://github.com/aws/aws-lc/blob/98735a2f6723ba984a18b2f79e05173a61e0f869/crypto/fipsmodule/modes/gcm.c#L191). This renders the tail code in `aesv8-gcm-armv8.pl` dead. Simply removing the truncation to 16-byte aligned data in `gcm.c` -- that is, attempting to let `aes_gcm_{dec,enc}_kernel` process the entire data -- leads to tests failing. It is not clear to me why that is, and in particular the tail code could be faulty. OpenSSL seems to behave similarly and call the AArch64 AES-GCM kernels for block-sized data only. This PR removes the dead tail code from the non-SHA3 AES-GCM kernels `aes_gcm_enc_kernel` and `aes_gcm_dec_kernel`. In a first commit, the code is annotated to explain the effect of the tail code in case of block-aligned data. In the second commit, the tail code is removed. It seems that a similar change can be made for the AES-GCM kernels leveraging SHA3 instructions, but is not attempted here.
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