Release v1.4.15a
Bug Fix Release
This fix upgrades DDR IP and regenerates IP outputs to fix the issue described in Xilinx AR#73068
Changes:
-
Add upgrade ip changes to the init.tcl file
-
Updated the cl_dram_dma public AFI
This fix upgrades DDR IP and regenerates IP outputs to fix the issue described in Xilinx AR#73068
Changes:
Add upgrade ip changes to the init.tcl file
Updated the cl_dram_dma public AFI