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KiCAD Schematic Exporter - The Saga Continues #106

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ecd6085
Readd "crud for later"
mawildoer Sep 24, 2024
65f81a0
Add geometry bbox methods to sch transformer
mawildoer Sep 24, 2024
5059b16
Make dataclass for options
mawildoer Sep 24, 2024
ee7b4a4
Tidy symbol layout traits
mawildoer Sep 24, 2024
38d9b12
Minor transformer cleanup
mawildoer Sep 24, 2024
4a9edc6
Too many modifications to the original code. Trying another method
mawildoer Sep 24, 2024
2aaa9b9
Revert "Too many modifications to the original code. Trying another m…
mawildoer Sep 24, 2024
8009559
Restart with skidl
mawildoer Sep 24, 2024
a327ace
Re-add fresh sch layout lib
mawildoer Sep 24, 2024
ae48b59
Repoint imports
mawildoer Sep 24, 2024
fb85147
Remove fucked up globals
mawildoer Sep 24, 2024
2de863e
Part as a trait
mawildoer Sep 24, 2024
007b559
Pre-typing
mawildoer Sep 24, 2024
78b578f
Add typing to first few functions of place.py
mawildoer Sep 24, 2024
9c593fc
Typing progress
mawildoer Sep 24, 2024
64ac529
More typing...
mawildoer Sep 24, 2024
e275f2d
NetTerminal sufficently together
mawildoer Sep 24, 2024
e24a3f5
Finish typing place.py!
mawildoer Sep 24, 2024
b872f47
Type options
mawildoer Sep 24, 2024
acd9581
Continue typing, over on route
mawildoer Sep 24, 2024
2f58c97
Typing....
mawildoer Sep 24, 2024
ce2f341
Finish module-level typing route.py
mawildoer Sep 24, 2024
ec5bd10
Typing on route done too!
mawildoer Sep 24, 2024
08c6c88
Type geometry
mawildoer Sep 24, 2024
8e07468
NamedTuples -> dataclasses and largely type bbox. I reckon we might r…
mawildoer Sep 24, 2024
bd5d566
Add circuit and types to node.py
mawildoer Sep 24, 2024
c7b39b7
Add noqa for line-length
mawildoer Sep 24, 2024
d932854
Add typing to gen_schematic and pre-empt modifying functions to pull …
mawildoer Sep 25, 2024
3351069
Sort shim attrs and add add attrs from `getattr`
mawildoer Sep 25, 2024
eb4f9d7
Organise shim attributes into required and not
mawildoer Sep 25, 2024
5cf78b3
First information across boundary
mawildoer Sep 25, 2024
4411dae
Type debug_draw
mawildoer Sep 25, 2024
dcf1983
Add property markers to transformer
mawildoer Sep 25, 2024
e15d7c3
Add bare_bbox attr to shim
mawildoer Sep 25, 2024
59085e3
Add shim builders!
mawildoer Sep 26, 2024
0bf421a
Cleanup so tests import
mawildoer Sep 26, 2024
319ed70
We pass audit!!!!
mawildoer Sep 28, 2024
ff9df92
Format transformer.py
mawildoer Sep 28, 2024
6d5a613
Progress on auto-sch layout generator. Basically runs, but there are …
mawildoer Sep 30, 2024
c2b0879
Auto-place/route runs to completion
mawildoer Oct 1, 2024
2cb6c81
Format place and route
mawildoer Oct 1, 2024
e11eaeb
Print tables only when debugging
mawildoer Oct 1, 2024
be7d019
Add interface to Pad. Seems simpler with a reference, but I don't wan…
mawildoer Oct 2, 2024
df44fb1
Add skeleton helpers to fileformats_sch
mawildoer Oct 2, 2024
cdf1704
Add separate logging levels to core
mawildoer Oct 2, 2024
d10d82c
Optional Reference
mawildoer Oct 11, 2024
1ffa83f
Format
mawildoer Oct 11, 2024
fdc544a
Download symbols properly
mawildoer Oct 11, 2024
01213db
Add explicit flag to has_overridden_name
mawildoer Oct 12, 2024
3cb2057
OMG it's working
mawildoer Oct 12, 2024
8ac3cec
Improve debug view
mawildoer Oct 22, 2024
83694f2
Spit out come schematic
mawildoer Oct 22, 2024
d9beda0
Fix pin orientations
mawildoer Oct 23, 2024
4afbc91
Improve marking
mawildoer Oct 23, 2024
29af66f
Fix attachment of existing symbols
mawildoer Oct 23, 2024
641ec5b
Fix hierarchy strings to flatten design
mawildoer Oct 23, 2024
28e7f6f
Fix and test marking
mawildoer Oct 23, 2024
daacc3a
Explain hierarchy
mawildoer Oct 23, 2024
facea6f
pre-commit tidy up
mawildoer Oct 23, 2024
7324d27
Fix power and ground pin detection
mawildoer Oct 23, 2024
f4fdc56
Rotate the net-terminals correctly
mawildoer Oct 24, 2024
d94da09
Wire segments were out of order, which made them netty
mawildoer Oct 24, 2024
6106109
Test marking on wires as well
mawildoer Oct 24, 2024
eacf59f
Hide faebryk mark
mawildoer Oct 24, 2024
0bb302b
Allow rotations of things without symtx
mawildoer Oct 24, 2024
7ce863b
Improve some hierarchy shenanigans
mawildoer Oct 25, 2024
723836a
Unorthodox (eg. no SKiddilish) mechanism to flatten parts before addi…
mawildoer Oct 25, 2024
0bace49
Add safety in case of missing tracks for routing
mawildoer Oct 25, 2024
d929bbc
Remove content that was commented out on Skidl anyway
mawildoer Oct 25, 2024
79a40d4
Reenable flattened node offsets
mawildoer Oct 25, 2024
78e9d59
Modify flattening logic in export
mawildoer Oct 25, 2024
ed7f982
Find simultaneous flipping and rotations
mawildoer Oct 25, 2024
5bf245b
Tidy
mawildoer Oct 25, 2024
f3a344e
Ignore all skidl imported files because they use different linting rules
mawildoer Oct 28, 2024
6d2e9d8
Accelerated minimal LED failing
mawildoer Oct 29, 2024
2ef168c
Skip picking
mawildoer Oct 31, 2024
9d55305
Format
mawildoer Oct 31, 2024
37641af
Protect indexing files
mawildoer Oct 31, 2024
4dfa6b4
Stabalise dev_schematics
mawildoer Nov 1, 2024
6351c83
Battery is the right way up
mawildoer Nov 1, 2024
51f5b2b
Add schematic hints
mawildoer Nov 1, 2024
12f9cca
Fix motherfucking backwards-ass rotation matrices
mawildoer Nov 1, 2024
0e31597
Rotations work! Yeeeeewwww!
mawildoer Nov 2, 2024
3e23c29
Add basic options to the schematic transformer
mawildoer Nov 2, 2024
c01e06d
Fix for alternative circle definition
mawildoer Nov 3, 2024
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97 changes: 97 additions & 0 deletions dev_schematics.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,97 @@
"""
Issues:

- [ ] Component references aren't aligned to anything in particular

- [ ] Add top-level global labels

- [x] Multiple net terminals of the same net

- [x] X/Y flips are dependent on the rotation of the part

- [x] Parts aren't being rotated properly

- [x] Battery's 180 degrees off

- [x] Unit should be 1, not 0

- [x] Placed off-sheet

- [x] Nets are netty

- [x] Global labels aren't being rotated appropriately
They're actually only able to be aligned down or left.
This seems like we should be adding net tags instead of global labels.

- [x] The net terminals appear to be on the wrong side of the parts
(which is causing the wire cross-over)

- [x] Marking isn't reloading properly

- [x] Power pins aren't being properly detected

"""

import contextlib
import logging
import sys
from pathlib import Path

import faebryk.library._F as F

Check failure on line 40 in dev_schematics.py

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dev_schematics.py:40:30: F401 `faebryk.library._F` imported but unused
from faebryk.core.module import Module

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dev_schematics.py:41:33: F401 `faebryk.core.module.Module` imported but unused
from faebryk.exporters.schematic.kicad.skidl.shims import Options
from faebryk.exporters.schematic.kicad.transformer import Transformer
from faebryk.libs.examples.buildutil import apply_design_to_pcb
from faebryk.libs.kicad.fileformats_sch import C_kicad_sch_file

logging.basicConfig(level=logging.DEBUG)
logger = logging.getLogger(__name__)

root_dir = Path(__file__).parent
test_dir = root_dir / "test"
build_dir = root_dir / "build"

fp_lib_path_path = build_dir / "kicad/source/fp-lib-table"
sch_file = C_kicad_sch_file.skeleton()
# sch_file = C_kicad_sch_file.loads(test_dir / "common/resources/test.kicad_sch")


@contextlib.contextmanager
def add_to_sys_path(path):
sys.path.append(str(path))
yield
sys.path.remove(str(path))


with add_to_sys_path(root_dir / "examples"):
from iterative_design_nand import App

app = App()

# assert isinstance(app, Module)
# assert isinstance(app.battery, F.Battery)
# assert isinstance(app.led, F.PoweredLED)
# app.led.led.add(F.has_descriptive_properties_defined({"LCSC": "C7429912"}))
# app.led.current_limiting_resistor.add(
# F.has_descriptive_properties_defined({"LCSC": "C25077"})
# )

apply_design_to_pcb(app)


full_transformer = Transformer(sch_file.kicad_sch, app.get_graph(), app)
full_transformer.index_symbol_files(fp_lib_path_path, load_globals=False)

options = Options(
# draw_global_routing=True,
draw_placement=True,
draw_pin_names=True,
# draw_routing=True,
# draw_routing_channels=True,
# draw_switchbox_boundary=True,
# draw_switchbox_routing=True,
)

sch = full_transformer.generate_schematic(**options)

sch_file.dumps(build_dir / "kicad/source/test.kicad_sch")
5 changes: 3 additions & 2 deletions pyproject.toml
Original file line number Diff line number Diff line change
Expand Up @@ -200,11 +200,12 @@ exclude = [
"node_modules",
"venv",
]
per-file-ignores = {}

# Allow unused variables when underscore-prefixed.
dummy-variable-rgx = "^(_+|(_+[a-zA-Z0-9_]*[a-zA-Z0-9]+?))$"

[tool.ruff.lint.per-file-ignores]
# SKiDL imported files are ignored because they use different linting rules to us
"src/faebryk/exporters/schematic/kicad/skidl/*" = ["ALL"]

[tool.ruff.lint.mccabe]
# Unlike Flake8, default to a complexity level of 10.
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21 changes: 21 additions & 0 deletions src/faebryk/core/__init__.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
import logging
from enum import StrEnum

from faebryk.libs.util import ConfigFlagEnum

logger = logging.getLogger(__name__)


class LogLevel(StrEnum):
CRITICAL = "CRITICAL"
FATAL = "FATAL"
ERROR = "ERROR"
WARN = "WARN"
WARNING = "WARNING"
INFO = "INFO"
DEBUG = "DEBUG"
NOTSET = "NOTSET"


log_level = ConfigFlagEnum(LogLevel, "CORE_LOG_LEVEL", LogLevel.INFO)
logger.setLevel(logging.getLevelNamesMapping()[log_level.get()])
5 changes: 4 additions & 1 deletion src/faebryk/core/reference.py
Original file line number Diff line number Diff line change
Expand Up @@ -13,16 +13,19 @@ class Reference[O: Node](constructed_field):
class UnboundError(Exception):
"""Cannot resolve unbound reference"""

def __init__(self, out_type: type[O] | None = None):
def __init__(self, out_type: type[O] | None = None, optional: bool = False):
self.gifs: dict[Node, GraphInterfaceReference] = defaultdict(
GraphInterfaceReference
)
self.is_set: set[Node] = set()
self.optional = optional

def get(instance: Node) -> O:
try:
return self.gifs[instance].get_reference()
except GraphInterfaceReference.UnboundError as ex:
if self.optional:
return None
raise Reference.UnboundError from ex

def set_(instance: Node, value: O):
Expand Down
3 changes: 2 additions & 1 deletion src/faebryk/exporters/netlist/graph.py
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,8 @@ def get_or_set_name_and_value_of_node(c: Module):
c.get_full_name(),
type(c).__name__,
value,
)
),
explicit=False,
)
)

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