Various fixes and additions

src/faebryk/library/B0505S.py → src/faebryk/library/B0505S_1WR3.py

@@ -6,14 +6,16 @@
 import faebryk.library._F as F  # noqa: F401
 from faebryk.core.module import Module
 from faebryk.libs.library import L  # noqa: F401
+from faebryk.libs.picker.picker import DescriptiveProperties
 from faebryk.libs.units import P  # noqa: F401
 
 logger = logging.getLogger(__name__)
 
 
-class B0505S(Module):
+class B0505S_1WR3(Module):
     """
-    Isolated 5V DC to 5V DC converter
+    Isolated 5V DC to 5V DC converter.
+    R suffix is for shortcircuit protection
     """
 
     # ----------------------------------------
@@ -59,3 +61,11 @@ def __preinit__(self):
         # ----------------------------------------
         self.power_in.voltage.merge(F.Range(4.3 * P.V, 9 * P.V))
         self.power_out.voltage.merge(F.Range.from_center(5 * P.V, 0.5 * P.V))
+
+        self.add(
+            F.has_descriptive_properties_defined(
+                {
+                    DescriptiveProperties.partno: "B0505S-1WR3",
+                },
+            )
+        )

src/faebryk/library/CH342.py

@@ -30,12 +30,12 @@ class DuplexMode(Enum):
     ri = L.list_field(2, F.ElectricLogic)
     dcd = L.list_field(2, F.ElectricLogic)
 
-    reset = F.ElectricLogic()
-    active = F.ElectricLogic()
+    reset: F.ElectricLogic
+    active: F.ElectricLogic
 
-    vdd_5v = F.ElectricPower()
-    v_io = F.ElectricPower()
-    v_3v = F.ElectricPower()
+    vdd_5v: F.ElectricPower
+    v_io: F.ElectricPower
+    v_3v: F.ElectricPower
 
     # ----------------------------------------
     #                 traits

src/faebryk/library/CH344.py

@@ -68,7 +68,7 @@ def __preinit__(self):
         self.gpio[14].connect(self.uart[0].dsr)
         self.gpio[15].connect(self.uart[1].dcd)
 
-        self.test.pulled.pull(up=False).resistance.merge(4.7 * P.kOhm)
+        self.test.pulled.pull(up=False).resistance.merge(4.7 * P.kohm)
         # ------------------------------------
         #          parametrization
         # ------------------------------------

src/faebryk/library/DE9Connector.py

@@ -20,6 +20,7 @@ class DE9Connector(Module):
     #     modules, interfaces, parameters
     # ----------------------------------------
     unnamed = L.list_field(9, F.Electrical)
+    shield: F.Electrical
 
     # ----------------------------------------
     #                 traits

src/faebryk/library/DE9RS232Connector.py

@@ -19,32 +19,31 @@ class DE9RS232Connector(F.DE9Connector):
     #     modules, interfaces, parameters
     # ----------------------------------------
     rs232: F.RS232
-    gnd: F.Electrical
-    shield: F.Electrical
+    signal_gnd: F.Electrical
 
     # ----------------------------------------
     #                 traits
     # ----------------------------------------
     @L.rt_field
     def can_attach_to_footprint(self):
-        pinmap = {f"{i}": ei for i, ei in enumerate(self.unnamed)}
+        pinmap = {f"{i+1}": ei for i, ei in enumerate(self.unnamed)}
         pinmap.update({"10": self.shield})
         return F.can_attach_to_footprint_via_pinmap(pinmap)
 
     def __preinit__(self):
         # ------------------------------------
         #           connections
         # ------------------------------------
-        self.rs232.tx.signal.connect(self.unnamed[3])
-        self.rs232.rx.signal.connect(self.unnamed[2])
-        self.rs232.dtr.signal.connect(self.unnamed[4])
-        self.rs232.dcd.signal.connect(self.unnamed[1])
-        self.rs232.dsr.signal.connect(self.unnamed[6])
-        self.rs232.ri.signal.connect(self.unnamed[9])
-        self.rs232.rts.signal.connect(self.unnamed[7])
-        self.rs232.cts.signal.connect(self.unnamed[8])
-
-        self.gnd.connect(self.unnamed[5])
+        self.rs232.tx.signal.connect(self.unnamed[2])
+        self.rs232.rx.signal.connect(self.unnamed[1])
+        self.rs232.dtr.signal.connect(self.unnamed[3])
+        self.rs232.dcd.signal.connect(self.unnamed[0])
+        self.rs232.dsr.signal.connect(self.unnamed[5])
+        self.rs232.ri.signal.connect(self.unnamed[8])
+        self.rs232.rts.signal.connect(self.unnamed[6])
+        self.rs232.cts.signal.connect(self.unnamed[7])
+
+        self.signal_gnd.connect(self.unnamed[4])
 
         # ------------------------------------
         #          parametrization

src/faebryk/library/ISO1540DR.py → src/faebryk/library/ISO1540.py

@@ -6,6 +6,7 @@
 import faebryk.library._F as F  # noqa: F401
 from faebryk.core.module import Module
 from faebryk.libs.library import L  # noqa: F401
+from faebryk.libs.picker.picker import DescriptiveProperties
 from faebryk.libs.units import P  # noqa: F401
 
 logger = logging.getLogger(__name__)
@@ -60,3 +61,12 @@ def __preinit__(self):
 
         self.power.decoupled.decouple().capacitance.merge(10 * P.uF)
         self.power_iso.decoupled.decouple().capacitance.merge(10 * P.uF)
+
+        self.add(
+            F.has_descriptive_properties_defined(
+                {
+                    DescriptiveProperties.manufacturer: "Texas Instruments",
+                    DescriptiveProperties.partno: "ISO1540DR",
+                },
+            )
+        )

src/faebryk/library/RS232_3D5R_Tranceiver.py

@@ -4,26 +4,23 @@
 import logging
 
 import faebryk.library._F as F  # noqa: F401
+from faebryk.core.module import Module
 from faebryk.libs.library import L  # noqa: F401
 from faebryk.libs.units import P  # noqa: F401
 
 logger = logging.getLogger(__name__)
 
 
-class RS232_3D5R_Tranceiver(F.RS232TranceiverBase):
+class RS232_3D5R_Tranceiver(Module):
     """
-    Generic 3 drivers + 5 receivers RS232 Tranceiver
+    Generic 3 drivers + 5 receivers RS232 Tranceiver base
     """
 
     # ----------------------------------------
     #     modules, interfaces, parameters
     # ----------------------------------------
-    uart_logic = F.UART
-    uart_rs232 = F.RS232
-
-    enable: F.ElectricLogic
-    online: F.ElectricLogic
-    status: F.ElectricLogic
+    uart_logic: F.UART
+    uart_rs232: F.RS232
 
     # ----------------------------------------
     #                 traits

src/faebryk/library/RS232TranceiverBase.py → src/faebryk/library/SP3243E.py

@@ -4,14 +4,14 @@
 import logging
 
 import faebryk.library._F as F  # noqa: F401
-from faebryk.core.module import Module
 from faebryk.libs.library import L  # noqa: F401
+from faebryk.libs.picker.picker import DescriptiveProperties
 from faebryk.libs.units import P  # noqa: F401
 
 logger = logging.getLogger(__name__)
 
 
-class RS232TranceiverBase(Module):
+class SP3243E(F.RS232_3D5R_Tranceiver):
     """
     Common base module for RS232 tranceivers
     """
@@ -26,11 +26,16 @@ class RS232TranceiverBase(Module):
     power: F.ElectricPower
 
     enable: F.ElectricLogic
+    online: F.ElectricLogic
+    status: F.ElectricLogic
 
     # ----------------------------------------
     #                 traits
     # ----------------------------------------
     designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
+    datasheet = L.f_field(F.has_datasheet_defined)(
+        "https://assets.maxlinear.com/web/documents/sp3243e.pdf"
+    )
 
     def __preinit__(self):
         # ------------------------------------
@@ -44,9 +49,19 @@ def __preinit__(self):
             # 3.0V to 5.5V > C_all = 0.22μF
             #
             cap.capacitance.merge(0.22 * P.uF)
-            cap.rated_voltage.merge(F.Range.lower_bound(16 * P.V))
+            # cap.rated_voltage.override(F.Range.lower_bound(16 * P.V))
+            # TODO: merge conflict
 
         # ------------------------------------
         #          parametrization
         # ------------------------------------
         self.power.voltage.merge(F.Range(3.0 * P.V, 5.5 * P.V))
+
+        self.add(
+            F.has_descriptive_properties_defined(
+                {
+                    DescriptiveProperties.manufacturer: "MaxLinear",
+                    DescriptiveProperties.partno: "SP3243EBEA-L/TR",
+                },
+            )
+        )

src/faebryk/library/_F.py

@@ -137,7 +137,7 @@
 from faebryk.library.can_be_surge_protected_defined import can_be_surge_protected_defined
 from faebryk.library.can_be_decoupled_defined import can_be_decoupled_defined
 from faebryk.library.ElectricPower import ElectricPower
-from faebryk.library.B0505S import B0505S
+from faebryk.library.B0505S_1WR3 import B0505S_1WR3
 from faebryk.library.Battery import Battery
 from faebryk.library.Comparator import Comparator
 from faebryk.library.Crystal_Oscillator import Crystal_Oscillator
@@ -159,7 +159,6 @@
 from faebryk.library.MultiSPI import MultiSPI
 from faebryk.library.PowerMux import PowerMux
 from faebryk.library.RS232 import RS232
-from faebryk.library.RS232TranceiverBase import RS232TranceiverBase
 from faebryk.library.SK9822_EC20 import SK9822_EC20
 from faebryk.library.SNx4LVC541A import SNx4LVC541A
 from faebryk.library.SWD import SWD
@@ -174,7 +173,7 @@
 from faebryk.library.Logic74xx import Logic74xx
 from faebryk.library.BH1750FVI_TR import BH1750FVI_TR
 from faebryk.library.EEPROM import EEPROM
-from faebryk.library.ISO1540DR import ISO1540DR
+from faebryk.library.ISO1540 import ISO1540
 from faebryk.library.M24C08_FMN6TP import M24C08_FMN6TP
 from faebryk.library.OLED_Module import OLED_Module
 from faebryk.library.QWIIC import QWIIC
@@ -210,6 +209,7 @@
 from faebryk.library.USB3 import USB3
 from faebryk.library.PowerSwitch import PowerSwitch
 from faebryk.library.TI_CD4011BE import TI_CD4011BE
+from faebryk.library.SP3243E import SP3243E
 from faebryk.library.CBM9002A_56ILG_Reference_Design import CBM9002A_56ILG_Reference_Design
 from faebryk.library.USB_RS485 import USB_RS485
 from faebryk.library.CH342F import CH342F