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Fix: Library: Missing/wrong references and connections (#66)
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* Fix: signal references and connections
* Add: pin heuristic and pinmap
* Change: all designators prefixes to use default from lib
* Fix: USB IF
* Differential pair is now SignalElectrical
* Add: AiP74LVC1T45 level shifter
* Fix: designator prefix case
* "Fix" ElectricPower.fused test
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ruben-iteng authored Sep 27, 2024
1 parent 326181d commit 70ab7b2
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8 changes: 7 additions & 1 deletion src/faebryk/library/B0505S_1WR3.py
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,13 @@ class B0505S_1WR3(Module):
# ----------------------------------------
# traits
# ----------------------------------------
designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
@L.rt_field
def bridge(self):
return F.can_bridge_defined(self.power_in, self.power_out)

designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)

datasheet = L.f_field(F.has_datasheet_defined)(
"https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2307211806_EVISUN-B0505S-1WR3_C7465178.pdf"
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4 changes: 3 additions & 1 deletion src/faebryk/library/B4B_ZR_SM4_TF.py
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,9 @@ class B4B_ZR_SM4_TF(Module):
datasheet = L.f_field(F.has_datasheet_defined)(
"https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2304140030_BOOMELE-Boom-Precision-Elec-1-5-4P_C145997.pdf"
)
designator_prefix = L.f_field(F.has_designator_prefix_defined)("J")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.J
)

@L.rt_field
def can_attach_to_footprint(self):
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4 changes: 3 additions & 1 deletion src/faebryk/library/BH1750FVI_TR.py
Original file line number Diff line number Diff line change
Expand Up @@ -82,7 +82,9 @@ def single_electric_reference(self):
F.ElectricLogic.connect_all_module_references(self)
)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)

@L.rt_field
def attach_to_footprint(self):
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4 changes: 3 additions & 1 deletion src/faebryk/library/BJT.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,9 @@ class OperationRegion(Enum):
base: F.Electrical
collector: F.Electrical

designator_prefix = L.f_field(F.has_designator_prefix_defined)("Q")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.Q
)

@rt_field
def can_bridge(self):
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4 changes: 3 additions & 1 deletion src/faebryk/library/ButtonCell.py
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,8 @@ class Size(IntEnum):
shape: F.TBD[Shape]
size: F.TBD[Size]

designator_prefix = L.f_field(F.has_designator_prefix_defined)("B")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.B
)

# TODO merge voltage with material voltage
4 changes: 3 additions & 1 deletion src/faebryk/library/CBM9002A_56ILG.py
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,9 @@ class CBM9002A_56ILG(Module):
# ----------------------------------------
# traits
# ----------------------------------------
designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
datasheet = L.f_field(F.has_datasheet_defined)(
"https://corebai.com/Data/corebai/upload/file/20240201/CBM9002A.pdf"
)
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6 changes: 4 additions & 2 deletions src/faebryk/library/CH340x.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,10 +14,12 @@
class CH340x(Module):
usb: F.USB2_0
uart: F.UART
tnow: F.Electrical
tnow: F.ElectricLogic
gpio_power: F.ElectricPower

designator = L.f_field(F.has_designator_prefix_defined)("U")
designator = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
datasheet = L.f_field(F.has_datasheet_defined)(
"https://wch-ic.com/downloads/file/79.html"
)
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8 changes: 4 additions & 4 deletions src/faebryk/library/CH342F.py
Original file line number Diff line number Diff line change
Expand Up @@ -53,8 +53,8 @@ def can_attach_to_footprint(self):
{
"1": self.uart[0].uart.ri.signal,
"2": self.usb.usb_if.buspower.lv,
"3": self.usb.usb_if.d.p,
"4": self.usb.usb_if.d.n,
"3": self.usb.usb_if.d.p.signal,
"4": self.usb.usb_if.d.n.signal,
"5": self.power_io.hv,
"6": self.power_3v.hv,
"7": self.integrated_regulator.power_in.hv,
Expand Down Expand Up @@ -102,8 +102,8 @@ def pin_association_heuristic(self):
self.uart[1].uart.base_uart.rx.signal: ["RXD1"],
self.uart[0].uart.base_uart.tx.signal: ["TXD0"],
self.uart[1].uart.base_uart.tx.signal: ["TXD1"],
self.usb.usb_if.d.p: ["UD+"],
self.usb.usb_if.d.n: ["UD-"],
self.usb.usb_if.d.p.signal: ["UD+"],
self.usb.usb_if.d.n.signal: ["UD-"],
self.power_3v.hv: ["V3"],
self.vbus_detect.signal: ["VBUS"],
self.integrated_regulator.power_in.hv: ["VDD5"],
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4 changes: 2 additions & 2 deletions src/faebryk/library/CH342K.py
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ def pin_association_heuristic(self):
self.uart_base[0].tx.signal: ["TXD0"],
self.uart_base[1].rx.signal: ["RXD1"],
self.uart_base[1].tx.signal: ["TXD1"],
self.usb.usb_if.d.p: ["UD+"],
self.usb.usb_if.d.n: ["UD-"],
self.usb.usb_if.d.p.signal: ["UD+"],
self.usb.usb_if.d.n.signal: ["UD-"],
self.power_3v.hv: ["V3"],
self.integrated_regulator.power_in.hv: ["VDD5"],
self.power_io.hv: ["VIO"],
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2 changes: 1 addition & 1 deletion src/faebryk/library/CH344.py
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ class CH344(Module):
# ----------------------------------------
# modules, interfaces, parameters
# ----------------------------------------
usb: F.USB2_0 # TODO not a full USB, only data bus
usb: F.USB2_0_IF.Data
uart = L.list_field(4, F.UART)
act: F.ElectricLogic
indicator_tx: F.ElectricLogic
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8 changes: 4 additions & 4 deletions src/faebryk/library/CH344Q.py
Original file line number Diff line number Diff line change
Expand Up @@ -118,13 +118,13 @@ def can_attach_to_footprint(self):
"34": self.uart[3].dtr.signal,
"35": self.power.lv,
"36": self.power.hv,
"37": self.uart[3].base_uart.tx,
"38": self.uart[3].base_uart.rx,
"37": self.uart[3].base_uart.tx.signal,
"38": self.uart[3].base_uart.rx.signal,
"39": self.uart[0].dtr.signal,
"40": self.uart[0].rts.signal,
"41": self.uart[0].cts.signal,
"42": self.usb.usb_if.d.n,
"43": self.usb.usb_if.d.p,
"42": self.usb.n,
"43": self.usb.p,
"44": self.test.signal,
"45": self.uart[3].rts.signal,
"46": self.uart[3].cts.signal,
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10 changes: 8 additions & 2 deletions src/faebryk/library/CH344Q_ReferenceDesign.py
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ def __preinit__(self):
) # TODO: per pin
self.vbus_fused.connect_via(self.ldo, pwr_3v3)

self.usb.connect(self.usb_uart_converter.usb)
self.usb.usb_if.d.connect(self.usb_uart_converter.usb)

self.usb_uart_converter.act.connect(self.led_act.logic_in)
self.usb_uart_converter.indicator_rx.connect(self.led_rx.logic_in)
Expand Down Expand Up @@ -80,10 +80,16 @@ def __preinit__(self):
self.oscillator.crystal.frequency_tolerance.merge(
F.Range.upper_bound(40 * P.ppm)
)
self.oscillator.crystal.load_capacitance.merge(
F.Range.from_center(8 * P.pF, 10 * P.pF)
) # TODO: should be property of crystal when picked

self.vbus_fused.max_current.merge(F.Range.lower_bound(500 * P.mA))
self.usb.usb_if.buspower.max_current.merge(
F.Range.from_center_rel(500 * P.mA, 0.1)
)

self.ldo.output_current.merge(F.Range.lower_bound(500 * P.mA))
self.ldo.output_voltage.merge(F.Range.from_center_rel(3.3 * P.V, 0.05))

# reset lowpass
self.reset_lowpass.response.merge(F.Filter.Response.LOWPASS)
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4 changes: 3 additions & 1 deletion src/faebryk/library/Capacitor.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,9 @@ class TemperatureCoefficient(IntEnum):
temperature_coefficient: F.TBD[TemperatureCoefficient]

attach_to_footprint: F.can_attach_to_footprint_symmetrically
designator_prefix = L.f_field(F.has_designator_prefix_defined)("C")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.C
)

@L.rt_field
def can_bridge(self):
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4 changes: 3 additions & 1 deletion src/faebryk/library/Common_Mode_Filter.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,4 +14,6 @@ class Common_Mode_Filter(Module):
c_a = L.list_field(2, F.Electrical)
c_b = L.list_field(2, F.Electrical)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("FL")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.FL
)
4 changes: 3 additions & 1 deletion src/faebryk/library/Comparator.py
Original file line number Diff line number Diff line change
Expand Up @@ -50,4 +50,6 @@ def simple_value_representation(self):
),
)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
4 changes: 3 additions & 1 deletion src/faebryk/library/Crystal.py
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,9 @@ class Crystal(Module):
# ----------------------------------------
# traits
# ----------------------------------------
designator = L.f_field(F.has_designator_prefix_defined)("XTAL")
designator = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.XTAL
)
footprint: F.can_attach_to_footprint_symmetrically

# ----------------------------------------
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20 changes: 20 additions & 0 deletions src/faebryk/library/DE9Connector.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,26 @@ class DE9Connector(Module):
F.has_designator_prefix.Prefix.X
)

@L.rt_field
def pin_association_heuristic(self):
return F.has_pin_association_heuristic_lookup_table(
mapping={
self.shield: ["MH1"],
self.shield: ["MH2"],
self.contact[0]: ["1"],
self.contact[1]: ["2"],
self.contact[2]: ["3"],
self.contact[3]: ["4"],
self.contact[4]: ["5"],
self.contact[5]: ["6"],
self.contact[6]: ["7"],
self.contact[7]: ["8"],
self.contact[8]: ["9"],
},
accept_prefix=False,
case_sensitive=False,
)

@L.rt_field
def can_attach_to_footprint(self):
pinmap = {f"{i+1}": ei for i, ei in enumerate(self.contact)}
Expand Down
8 changes: 4 additions & 4 deletions src/faebryk/library/DifferentialPair.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@


class DifferentialPair(ModuleInterface):
p: F.Electrical
n: F.Electrical
p: F.SignalElectrical
n: F.SignalElectrical

impedance: F.TBD[Quantity]

Expand All @@ -20,8 +20,8 @@ def terminated(self) -> Self:
for r in rs:
r.resistance.merge(self.impedance)

terminated_bus.p.connect_via(rs[0], self.p)
terminated_bus.n.connect_via(rs[1], self.n)
terminated_bus.p.signal.connect_via(rs[0], self.p.signal)
terminated_bus.n.signal.connect_via(rs[1], self.n.signal)
self.connect_shallow(terminated_bus)

return terminated_bus
4 changes: 3 additions & 1 deletion src/faebryk/library/Diode.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,9 @@ def simple_value_representation(self):
lambda p: p.as_unit("V"),
)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("D")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.D
)

@L.rt_field
def pin_association_heuristic(self):
Expand Down
10 changes: 7 additions & 3 deletions src/faebryk/library/Diodes_Incorporated_AP2552W6_7.py
Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,9 @@ def set_current_limit(self, current: Parameter[Quantity]) -> None:
# ----------------------------------------
# traits
# ----------------------------------------
designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
descriptive_properties = L.f_field(F.has_descriptive_properties_defined)(
{
DescriptiveProperties.manufacturer: "Diodes Incorporated",
Expand Down Expand Up @@ -122,8 +124,10 @@ def __preinit__(self):
# ------------------------------------
# connections
# ------------------------------------
F.ElectricLogic.connect_all_module_references(self, exclude={self.power_out})

F.ElectricLogic.connect_all_module_references(self, gnd_only=True)
F.ElectricLogic.connect_all_module_references(
self, exclude={self.power_in, self.power_out, self.ilim}
)
# ------------------------------------
# parametrization
# ------------------------------------
4 changes: 3 additions & 1 deletion src/faebryk/library/EEPROM.py
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,9 @@ def set_address(self, addr: int):
# traits
# ----------------------------------------

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)

@L.rt_field
def single_electric_reference(self):
Expand Down
4 changes: 3 additions & 1 deletion src/faebryk/library/ESP32_C3.py
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,9 @@ class ESP32_C3(Module):
uart = L.list_field(2, F.UART_Base)
# ... etc

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
datasheet = L.f_field(F.has_datasheet_defined)(
"https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf"
)
Expand Down
4 changes: 3 additions & 1 deletion src/faebryk/library/ESP32_C3_MINI_1.py
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,9 @@ def attach_to_footprint(self):

return F.can_attach_to_footprint_via_pinmap(self.pinmap)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)
datasheet = L.f_field(F.has_datasheet_defined)(
"https://www.espressif.com/sites/default/files/documentation/esp32-c3-mini-1_datasheet_en.pdf"
)
4 changes: 2 additions & 2 deletions src/faebryk/library/ESP32_C3_MINI_1_ReferenceDesign.py
Original file line number Diff line number Diff line change
Expand Up @@ -59,8 +59,8 @@ def __preinit__(self):

# TODO: set the following in the pinmux
# jtag gpio 4,5,6,7
esp32c3.usb.usb_if.d.n.connect(esp32c3.gpio[18].signal)
esp32c3.usb.usb_if.d.p.connect(esp32c3.gpio[19].signal)
esp32c3.usb.usb_if.d.n.signal.connect(esp32c3.gpio[18].signal)
esp32c3.usb.usb_if.d.p.signal.connect(esp32c3.gpio[19].signal)
# UART0 gpio 30/31 (default)
esp32c3.uart[0].rx.connect(esp32c3.gpio[20])
esp32c3.uart[0].tx.connect(esp32c3.gpio[21])
Expand Down
2 changes: 1 addition & 1 deletion src/faebryk/library/ElectricPower.py
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ def fused(self, attach_to: Node | None = None):

self.connect_shallow(fused_power)

fuse.trip_current.merge(F.Range(0 * P.A, self.max_current))
fuse.trip_current.merge(F.Constant(self.max_current))
# fused_power.max_current.merge(F.Range(0 * P.A, fuse.trip_current))

if attach_to is not None:
Expand Down
4 changes: 3 additions & 1 deletion src/faebryk/library/Fuse.py
Original file line number Diff line number Diff line change
Expand Up @@ -32,4 +32,6 @@ class ResponseType(Enum):
def can_bridge(self):
return F.can_bridge_defined(self.unnamed[0], self.unnamed[1])

designator_prefix = L.f_field(F.has_designator_prefix_defined)("F")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.F
)
4 changes: 3 additions & 1 deletion src/faebryk/library/GDT.py
Original file line number Diff line number Diff line change
Expand Up @@ -23,4 +23,6 @@ class GDT(Module):
def can_bridge(self):
return F.can_bridge_defined(self.tube_1, self.tube_2)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("GDT")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.GDT
)
4 changes: 3 additions & 1 deletion src/faebryk/library/HLK_LD2410B_P.py
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,9 @@ def single_electric_reference(self):
F.ElectricLogic.connect_all_module_references(self, gnd_only=True)
)

designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
designator_prefix = L.f_field(F.has_designator_prefix_defined)(
F.has_designator_prefix.Prefix.U
)

datasheet = L.f_field(F.has_datasheet_defined)(
"https://datasheet.lcsc.com/lcsc/2209271801_HI-LINK-HLK-LD2410B-P_C5183132.pdf"
Expand Down
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