handpick ruben lib fixes

src/faebryk/core/parameter.py

@@ -101,7 +101,9 @@ def _is_pair[T, U](type1: type[T], type2: type[U]) -> Optional[tuple[T, U]]:
             if isinstance(out, Operation):
                 raise self.MergeException("not resolvable")
             if out == Set([]) and not pair[0] == pair[1] == Set([]):
-                raise self.MergeException("conflicting sets/ranges")
+                raise self.MergeException(
+                    f"conflicting sets/ranges: {self!r} {other!r}"
+                )
             return out
 
         raise NotImplementedError

src/faebryk/library/Button.py

@@ -6,14 +6,16 @@
 import faebryk.library._F as F
 from faebryk.core.module import Module
 from faebryk.libs.library import L
+from faebryk.libs.units import Quantity
 
 logger = logging.getLogger(__name__)
 
 
 class Button(Module):
     unnamed = L.list_field(2, F.Electrical)
+    height: F.TBD[Quantity]
 
-    designator_prefix = L.f_field(F.has_designator_prefix_defined)("S")
+    designator_prefix = L.f_field(F.has_designator_prefix_defined)("SW")
 
     @L.rt_field
     def can_bridge(self):

src/faebryk/library/CBM9002A_56ILG.py

@@ -3,6 +3,7 @@
 
 import faebryk.library._F as F
 from faebryk.core.module import Module
+from faebryk.core.moduleinterface import ModuleInterface
 from faebryk.libs.library import L
 
 
@@ -43,15 +44,15 @@ class CBM9002A_56ILG(Module):
         "https://corebai.com/Data/corebai/upload/file/20240201/CBM9002A.pdf"
     )
 
-    @L.rt_field
-    def single_electric_reference(self):
-        return F.has_single_electric_reference_defined(
-            F.ElectricLogic.connect_all_module_references(self)
-        )
-
     # ----------------------------------------
     #                connections
     # ----------------------------------------
     def __preinit__(self):
         self.avcc.decoupled.decouple()  # TODO: decouple all pins
         self.vcc.decoupled.decouple()  # TODO: decouple all pins
+
+        F.ElectricLogic.connect_all_node_references(
+            self.get_children(direct_only=True, types=ModuleInterface).difference(
+                {self.avcc}
+            )
+        )

src/faebryk/library/CBM9002A_56ILG_Reference_Design.py

@@ -70,3 +70,10 @@ def __preinit__(self):
 
         self.oscillator.crystal.frequency.merge(F.Constant(24 * P.Mhertz))
         self.oscillator.crystal.load_impedance.merge(F.Constant(12 * P.pohm))
+
+        self.oscillator.crystal.frequency_temperature_tolerance.merge(20 * P.ppm)
+        # TODO: just set to a 1N4148
+        self.reset_diode.forward_voltage.merge(715 * P.mV)
+        self.reset_diode.reverse_leakage_current.merge(1 * P.uA)
+        self.reset_diode.current.merge(300 * P.mA)
+        self.reset_diode.max_current.merge(1 * P.A)

src/faebryk/library/Crystal_Oscillator.py

@@ -27,6 +27,7 @@ class Crystal_Oscillator(Module):
     #               parameters
     # ----------------------------------------
     # https://blog.adafruit.com/2012/01/24/choosing-the-right-crystal-and-caps-for-your-design/
+    # http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/APPLICATION_NOTE/CD00221665.pdf
     _STRAY_CAPACITANCE = F.Range(1 * P.nF, 5 * P.nF)
 
     @L.rt_field
@@ -57,3 +58,7 @@ def __preinit__(self):
 
         self.crystal.unnamed[0].connect(self.n)
         self.crystal.unnamed[1].connect(self.p)
+
+    @L.rt_field
+    def can_bridge(self):
+        return F.can_bridge_defined(self.p, self.n)

src/faebryk/library/ElectricPower.py

@@ -2,6 +2,8 @@
 # SPDX-License-Identifier: MIT
 
 
+import math
+
 import faebryk.library._F as F
 from faebryk.core.moduleinterface import ModuleInterface
 from faebryk.libs.library import L
@@ -22,7 +24,9 @@ def decouple(self):
                 super()
                 .decouple()
                 .builder(
-                    lambda c: c.rated_voltage.merge(F.Range(0 * P.V, obj.voltage * 2.0))
+                    lambda c: c.rated_voltage.merge(
+                        F.Range(obj.voltage * 2.0, math.inf * P.V)
+                    )
                 )
             )
 

src/faebryk/library/LDO.py

@@ -39,10 +39,10 @@ def __preinit__(self):
         self.power_out.decoupled.decouple()
 
         self.enable.reference.connect(self.power_in)
-        if self.output_polarity == self.OutputPolarity.POSITIVE:
-            self.power_in.lv.connect(self.power_out.lv)
-        else:
+        if self.output_polarity == self.OutputPolarity.NEGATIVE:
             self.power_in.hv.connect(self.power_out.hv)
+        else:
+            self.power_in.lv.connect(self.power_out.lv)
 
     @L.rt_field
     def can_bridge(self):

src/faebryk/library/OLED_Module.py

@@ -13,21 +13,34 @@
 
 
 class OLED_Module(Module):
-    class Resolution(Enum):
+    class DisplayResolution(Enum):
         H64xV32 = auto()
         H128xV32 = auto()
         H128xV64 = auto()
         H256xV64 = auto()
 
+    class DisplaySize(Enum):
+        INCH_0_96 = auto()
+        INCH_1_12 = auto()
+        INCH_1_27 = auto()
+        INCH_1_3 = auto()
+        INCH_1_5 = auto()
+        INCH_2_23 = auto()
+        INCH_2_3 = auto()
+        INCH_2_42 = auto()
+        INCH_2_7 = auto()
+
     class DisplayController(Enum):
         SSD1315 = auto()
         SSD1306 = auto()
+        SSD1309 = auto()
 
     power: F.ElectricPower
     i2c: F.I2C
 
-    resolution: F.TBD[Resolution]
+    display_resolution: F.TBD[DisplayResolution]
     display_controller: F.TBD[DisplayController]
+    display_size: F.TBD[DisplaySize]
 
     def __preinit__(self):
         self.power.voltage.merge(F.Range(3.0 * P.V, 5 * P.V))

src/faebryk/library/Powered_Relay.py

@@ -37,3 +37,9 @@ def __preinit__(self):
 
         self.relay.coil_n.connect_via(self.flyback_diode, self.relay.coil_p)
         self.indicator.power.connect(self.relay_driver.switched_power_out)
+
+    @L.rt_field
+    def single_electric_reference(self):
+        return F.has_single_electric_reference_defined(
+            F.ElectricLogic.connect_all_module_references(self, gnd_only=True)
+        )

src/faebryk/library/RP2040.py

@@ -5,7 +5,9 @@
 
 import faebryk.library._F as F
 from faebryk.core.module import Module
+from faebryk.core.moduleinterface import ModuleInterface
 from faebryk.libs.library import L
+from faebryk.libs.units import P
 
 logger = logging.getLogger(__name__)
 
@@ -30,6 +32,7 @@ class RP2040(Module):
     uart: F.UART_Base
 
     def __preinit__(self):
+        return
         # decouple power rails and connect GNDs toghether
         gnd = self.io_vdd.lv
         for pwrrail in [
@@ -44,9 +47,80 @@ def __preinit__(self):
             pwrrail.decoupled.decouple()
 
         # set parameters
-        # self.io_vdd.voltage.merge(F.Range(1.8*P.V, 3.63*P.V))
+        self.vreg_out.voltage.merge(1.1 * P.V)
+        self.io_vdd.voltage.merge(3.3 * P.V)
+
+        F.ElectricLogic.connect_all_node_references(
+            self.get_children(direct_only=True, types=ModuleInterface).difference(
+                {self.adc_vdd, self.core_vdd}
+            )
+        )
 
     designator_prefix = L.f_field(F.has_designator_prefix_defined)("U")
     datasheet = L.f_field(F.has_datasheet_defined)(
         "https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf"
     )
+
+    @L.rt_field
+    def attach_to_footprint(self):
+        return F.can_attach_to_footprint_via_pinmap(
+            {
+                "1": self.io_vdd.hv,
+                "2": self.gpio[0],
+                "3": self.gpio[1],
+                "4": self.gpio[2],
+                "5": self.gpio[3],
+                "6": self.gpio[4],
+                "7": self.gpio[5],
+                "8": self.gpio[6],
+                "9": self.gpio[7],
+                "10": self.io_vdd.hv,
+                "11": self.gpio[8],
+                "12": self.gpio[9],
+                "13": self.gpio[10],
+                "14": self.gpio[11],
+                "15": self.gpio[12],
+                "16": self.gpio[13],
+                "17": self.gpio[14],
+                "18": self.gpio[15],
+                "19": self.xin,
+                "20": self.xout,
+                "21": self.test,
+                "22": self.io_vdd.hv,
+                "23": self.core_vdd.hv,
+                "24": self.swd.clk.signal,
+                "25": self.swd.dio.signal,
+                "26": self.run.signal,
+                "27": self.gpio[16],
+                "28": self.gpio[17],
+                "29": self.gpio[18],
+                "30": self.gpio[19],
+                "31": self.gpio[20],
+                "32": self.gpio[21],
+                "33": self.io_vdd.hv,
+                "34": self.gpio[22],
+                "35": self.gpio[23],
+                "36": self.gpio[24],
+                "37": self.gpio[25],
+                "38": self.gpio[26],
+                "39": self.gpio[27],
+                "40": self.gpio[28],
+                "41": self.gpio[29],
+                "42": self.io_vdd.hv,
+                "43": self.adc_vdd.hv,
+                "44": self.vreg_in.hv,
+                "45": self.vreg_out.hv,
+                "46": self.usb.usb_if.d.n,
+                "47": self.usb.usb_if.d.p,
+                "48": self.usb.usb_if.buspower.hv,
+                "49": self.io_vdd.hv,
+                "50": self.core_vdd.hv,
+                "51": self.qspi.data[3].signal,
+                "52": self.qspi.clk.signal,
+                "53": self.qspi.data[0].signal,
+                "54": self.qspi.data[2].signal,
+                "55": self.qspi.data[1].signal,
+                "56": self.qspi.cs.signal,
+                "57": self.io_vdd.lv,
+            }
+        )