Update cortex-m-rt requirement from ^0.6.15 to ^0.7.2

[dependabot]

Updates the requirements on cortex-m-rt to permit the latest version.

Changelog

Sourced from cortex-m-rt's changelog.

Change Log

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[Unreleased]

Added

• Updated SCB.ICSR.VECTACTIVE/SCB::vect_active() to be 9 bits instead of 8. Also fixes VectActive::from to take a u16 and subtract 16 for VectActive::Interrupts to match SBC::vect_active() (#373).
• DWT: add configure API for address, cycle count comparison (#342, #367).
• ITM: add configure API (#342).
• TPIU: add API for Formatter and Flush Control (FFCR) and Selected Pin Control (SPPR) registers (#342).
• TPIU: add swo_supports for checking what SWO configurations the target supports. (#381)
• Add std and serde crate features for improved host-side ITM decode functionality when working with the downstream itm, cargo-rtic-scope crates (#363, #366).
• Added the ability to name the statics generated by singleton!() for better debuggability (#364, #380).
• Added critical-section-single-core feature which provides an implementation for the critical_section crate for single-core systems, based on disabling all interrupts. (#447)

Fixed

• Fixed singleton!() statics sometimes ending up in .data instead of .bss (#364, #380).
• interrupt::free no longer hands out a CriticalSection token because it is unsound on multi-core. Use critical_section::with instead. (#447)

Changed

• Inline assembly is now always used, requiring Rust 1.59.

Removed

• removed all peripherals ptr() functions in favor of the associated constant PTR (#385).
• removed inline-asm feature which is now always enabled

[v0.7.4] - 2021-12-31

Added

• Added support for additional DWT counters (#349)
  • CPI counter
  • Exception overhead counter
  • LSU counter
  • Folded-instruction counter
• Added DWT.set_cycle_count (#347).
• Added support for the Cortex-M7 TCM and cache access control registers. There is a feature cm7 to enable access to these (#352).
• Add derives for serde, Hash, and PartialOrd to VectActive behind feature gates for host-platform use (#363).
• Support host platforms besides x86_64 (#369).
• Added delay::Delay::with_source, a constructor that lets you specify the SysTick clock source (#374).

... (truncated)

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