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[config] Update configs for other platforms
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@equation314
equation314 committed Dec 23, 2024
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8 changes: 5 additions & 3 deletions .github/workflows/build.yml
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Expand Up @@ -122,11 +122,13 @@ jobs:
continue-on-error: ${{ matrix.rust-toolchain == 'nightly' }}
run: make PLATFORM=x86_64-pc-oslab A=examples/shell
- name: Build helloworld for aarch64-raspi4
run: make PLATFORM=aarch64-raspi4 A=examples/helloworld
run: make PLATFORM=aarch64-raspi4 SMP=4 A=examples/helloworld
- name: Build shell for aarch64-raspi4
run: make PLATFORM=aarch64-raspi4 A=examples/shell FEATURES=driver-bcm2835-sdhci
run: make PLATFORM=aarch64-raspi4 SMP=4 A=examples/shell FEATURES=driver-bcm2835-sdhci BUS=mmio
- name: Build helloworld for aarch64-bsta1000b
run: make PLATFORM=aarch64-bsta1000b A=examples/helloworld
run: make PLATFORM=aarch64-bsta1000b A=examples/helloworld SMP=8
- name: Build helloworld for aarch64-phytium-pi
run: make PLATFORM=aarch64-phytium-pi A=examples/helloworld SMP=4

- uses: ./.github/workflows/actions/setup-musl
with:
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4 changes: 2 additions & 2 deletions README.md
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Expand Up @@ -182,14 +182,14 @@ Set the `PLATFORM` variable when run `make`:

```bash
# Build helloworld for raspi4
make PLATFORM=aarch64-raspi4 A=examples/helloworld
make PLATFORM=aarch64-raspi4 SMP=4 A=examples/helloworld
```

You may also need to select the corrsponding device drivers by setting the `FEATURES` variable:

```bash
# Build the shell app for raspi4, and use the SD card driver
make PLATFORM=aarch64-raspi4 A=examples/shell FEATURES=driver-bcm2835-sdhci
make PLATFORM=aarch64-raspi4 SMP=4 A=examples/shell FEATURES=driver-bcm2835-sdhci BUS=mmio
# Build httpserver for the bare-metal x86_64 platform, and use the ixgbe and ramdisk driver
make PLATFORM=x86_64-pc-oslab A=examples/httpserver FEATURES=driver-ixgbe,driver-ramdisk SMP=4
```
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89 changes: 47 additions & 42 deletions configs/platforms/aarch64-bsta1000b.toml
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@@ -1,64 +1,69 @@
#
# Platform configs
#
[platform]
# Architecture identifier.
arch = "aarch64"
arch = "aarch64" # str
# Platform identifier.
platform = "aarch64-bsta1000b"
plat-name = "aarch64-bsta1000b" # str
# Platform family.
family = "aarch64-bsta1000b"
plat-family = "aarch64-bsta1000b" # str

# Base address of the whole physical memory.
phys-memory-base = "0x80000000"
phys-memory-base = 0x8000_0000 # uint
# Size of the whole physical memory.
phys-memory-size = "0x70000000"
# Offset of bus address and phys address. some boards, the bus address is
# different from the physical address.
phys-bus-offset = "0"
phys-memory-size = 0x7000_0000 # uint
# End address of the whole physical memory.
phys-memory-end = 0xf000_0000 # uint
# Base physical address of the kernel image.
kernel-base-paddr = "0x81000000"
kernel-base-paddr = 0x81000000 # uint
# Base virtual address of the kernel image.
kernel-base-vaddr = "0xffff_0000_8100_0000"
kernel-base-vaddr = "0xffff_0000_8100_0000" # uint
# Linear mapping offset, for quick conversions between physical and virtual
# addresses.
phys-virt-offset = "0xffff_0000_0000_0000"
phys-virt-offset = "0xffff_0000_0000_0000" # uint
# Offset of bus address and phys address. some boards, the bus address is
# different from the physical address.
phys-bus-offset = 0 # uint
# Kernel address space base.
kernel-aspace-base = "0xffff_0000_0000_0000"
kernel-aspace-base = "0xffff_0000_0000_0000" # uint
# Kernel address space size.
kernel-aspace-size = "0x0000_ffff_ffff_f000"
kernel-aspace-size = "0x0000_ffff_ffff_f000" # uint

#
# Device specifications
#
[devices]
# MMIO regions with format (`base_paddr`, `size`).
mmio-regions = [
["0x20008000", "0x1000"], # uart8250 UART0
["0x32000000", "0x8000"], # arm,gic-400
["0x32011000", "0x1000"], # CPU CSR
["0x33002000", "0x1000"], # Top CRM
["0x70035000", "0x1000"], # CRM reg
["0x70038000", "0x1000"], # aon pinmux
]

virtio-mmio-regions = []

# Base physical address of the PCIe ECAM space.
# pci-ecam-base = "0x40_1000_0000"
# End PCI bus number (`bus-range` property in device tree).
# pci-bus-end = "0xff"
# PCI device memory ranges (`ranges` property in device tree).
# pci-ranges = []
[0x20008000, 0x1000], # uart8250 UART0
[0x32000000, 0x8000], # arm,gic-400
[0x32011000, 0x1000], # CPU CSR
[0x33002000, 0x1000], # Top CRM
[0x70035000, 0x1000], # CRM reg
[0x70038000, 0x1000], # aon pinmux
] # [(uint, uint)]
# VirtIO MMIO regions with format (`base_paddr`, `size`).
virtio-mmio-regions = [] # [(uint, uint)]

# UART Address
uart-paddr = "0x20008000"
# UART irq from device tree
uart-irq = "0xd5"
# GICD Address
gicd-paddr = "0x32001000"
# GICC Address
gicc-paddr = "0x32002000"
uart-paddr = 0x2000_8000 # uint
# UART IRQ number
uart-irq = 0xd5 # uint

# GIC CPU Interface base address
gicc-paddr = 0x3200_2000 # uint
# GIC Distributor base address
gicd-paddr = 0x3200_1000 # uint

# BST A1000B board registers
CPU_CSR_BASE = "0x32011000"
A1000BASE_TOPCRM = "0x33002000"
A1000BASE_SAFETYCRM = "0x70035000"
A1000BASE_AONCFG = "0x70038000"
cpu-csr-base = 0x3201_1000 # uint
a1000base-topcrm = 0x3300_2000 # uint
a1000base-safetycrm = 0x7003_5000 # uint
a1000base-aoncfg = 0x7003_8000 # uint

# PSCI
psci-method = "smc"
psci-method = "smc" # str

# RTC (PL031) Address (Need to read from DTB).
rtc-paddr = "0x0"
rtc-paddr = 0x0 # uint
121 changes: 65 additions & 56 deletions configs/platforms/aarch64-phytium-pi.toml
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@@ -1,80 +1,89 @@
#
# Platform configs
#
[platform]
# Architecture identifier.
arch = "aarch64"
arch = "aarch64" # str
# Platform identifier.
platform = "aarch64-phytium-pi"
plat-name = "aarch64-phytium-pi" # str
# Platform family.
family = "aarch64-phytium-pi"
plat-family = "aarch64-phytium-pi" # str

# Base address of the whole physical memory.
phys-memory-base = "0x8000_0000"
# Size of the whole physical memory.
phys-memory-size = "0x8000_0000" # 2G
phys-memory-base = 0x8000_0000 # uint
# Size of the whole physical memory. (2G)
phys-memory-size = 0x8000_0000 # uint
# End address of the whole physical memory.
phys-memory-end = 0x1_0000_0000 # uint
# Base physical address of the kernel image.
kernel-base-paddr = "0x9000_0000"
kernel-base-paddr = 0x9000_0000 # uint
# Base virtual address of the kernel image.
kernel-base-vaddr = "0xffff_0000_9000_0000"
kernel-base-vaddr = "0xffff_0000_9000_0000" # uint
# Linear mapping offset, for quick conversions between physical and virtual
# addresses.
phys-virt-offset = "0xffff_0000_0000_0000"
phys-virt-offset = "0xffff_0000_0000_0000" # uint
# Offset of bus address and phys address. some boards, the bus address is
# different from the physical address.
phys-bus-offset = 0 # uint
# Kernel address space base.
kernel-aspace-base = "0xffff_0000_0000_0000"
kernel-aspace-base = "0xffff_0000_0000_0000" # uint
# Kernel address space size.
kernel-aspace-size = "0x0000_ffff_ffff_f000"
kernel-aspace-size = "0x0000_ffff_ffff_f000" # uint

#
# Device specifications
#
[devices]
# MMIO regions with format (`base_paddr`, `size`).
mmio-regions = [
["0x2800_C000", "0x1000"], # UART 0
["0x2800_D000", "0x1000"], # UART 1
["0x2800_E000", "0x1000"], # UART 2
["0x2800_F000", "0x1000"], # UART 3

["0x3000_0000", "0x800_0000"], # other devices
["0x4000_0000", "0x1000_0000"], # Pcie ecam

["0x5800_0000", "0x2800_0000"], # 32-bit MMIO space
[0x2800_C000, 0x1000], # UART 0
[0x2800_D000, 0x1000], # UART 1
[0x2800_E000, 0x1000], # UART 2
[0x2800_F000, 0x1000], # UART 3

["0x2801_4000", "0x2000"], # MIO0 - I2C
["0x2801_6000", "0x2000"], # MIO1 - I2C
["0x2801_8000", "0x2000"], # MIO2 - I2C
["0x2801_A000", "0x2000"], # MIO3 - I2C
["0x2801_C000", "0x2000"], # MIO4 - I2C
[0x3000_0000, 0x800_0000], # other devices
[0x4000_0000, 0x1000_0000], # Pcie ecam

["0x000_2803_4000", "0x1000"], # GPIO0
["0x000_2803_5000", "0x1000"], # GPIO1
["0x000_2803_6000", "0x1000"], # GPIO2
["0x000_2803_7000", "0x1000"], # GPIO3
["0x000_2803_8000", "0x1000"], # GPIO4
["0x000_2803_9000", "0x1000"], # GPIO5
]
[0x5800_0000, 0x2800_0000], # 32-bit MMIO space

# UART Address
uart-paddr = "0x2800_D000"
# UART Irq num
uart-irq = "24"

# MIO0 I2C
MIO0 = "0x2801_4000"

# PSCI
psci-method = "smc"

# GICC Address
gicc-paddr = "0x3080_0000"
# TODO: gicv3 dosen't support yet, there is no gicd and need a gicr address.
gicd-paddr = "0x3088_0000"
[0x2801_4000, 0x2000], # MIO0 - I2C
[0x2801_6000, 0x2000], # MIO1 - I2C
[0x2801_8000, 0x2000], # MIO2 - I2C
[0x2801_A000, 0x2000], # MIO3 - I2C
[0x2801_C000, 0x2000], # MIO4 - I2C

[0x000_2803_4000, 0x1000], # GPIO0
[0x000_2803_5000, 0x1000], # GPIO1
[0x000_2803_6000, 0x1000], # GPIO2
[0x000_2803_7000, 0x1000], # GPIO3
[0x000_2803_8000, 0x1000], # GPIO4
[0x000_2803_9000, 0x1000], # GPIO5
] # [(uint, uint)]
# VirtIO MMIO regions with format (`base_paddr`, `size`).
virtio-mmio-regions = [] # [(uint, uint)]
# Base physical address of the PCIe ECAM space.
pci-ecam-base = "0x4000_0000"
pci-ecam-base = 0x4000_0000 # uint
# End PCI bus number.
pci-bus-end = "0x2"
pci-bus-end = 0x2 # uint
# PCI device memory ranges.
pci-ranges = [
["0x0", "0x5000_0000"], # PIO space
["0x5800_0000", "0x2800_0000"], # 32-bit MMIO space
["0x10_0000_0000", "0x10_0000_0000"], # 64-bit MMIO space
]
[0x0, 0x5000_0000], # PIO space
[0x5800_0000, 0x2800_0000], # 32-bit MMIO space
[0x10_0000_0000, 0x10_0000_0000], # 64-bit MMIO space
] # [(uint, uint)]
# UART Address
uart-paddr = 0x2800_D000 # uint
# UART IRQ number
uart-irq = 0x54 # uint

# Number of CPUs
smp = "4"
# GIC CPU Interface base address
gicc-paddr = 0x3080_0000 # uint
# GIC Distributor base address
# (TODO: gicv3 dosen't support yet, there is no gicd and need a gicr address)
gicd-paddr = 0x3088_0000 # uint

# PSCI
psci-method = "smc" # str

# CPU Hardware ID list
cpu-id-list = ["0x0", "0x100", "0x200", "0x201"]
cpu-id-list = [0x0, 0x100, 0x200, 0x201]
59 changes: 36 additions & 23 deletions configs/platforms/aarch64-raspi4.toml
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Expand Up @@ -3,42 +3,55 @@
#
[platform]
# Architecture identifier.
arch = "aarch64"
arch = "aarch64" # str
# Platform identifier.
platform = "aarch64-raspi4"
plat-name = "aarch64-raspi4" # str
# Platform family.
family = "aarch64-raspi"
plat-family = "aarch64-raspi" # str

# Base address of the whole physical memory.
phys-memory-base = "0x0"
# Size of the whole physical memory.
phys-memory-size = "0xFC00_0000" # 3G 960M
phys-memory-base = 0x0 # uint
# Size of the whole physical memory. (3G 960M)
phys-memory-size = 0xFC00_0000 # uint
# End address of the whole physical memory.
phys-memory-end = 0xFC00_0000 # uint
# Base physical address of the kernel image.
kernel-base-paddr = "0x8_0000"
kernel-base-paddr = 0x8_0000 # uint
# Base virtual address of the kernel image.
kernel-base-vaddr = "0xffff_0000_0008_0000"
kernel-base-vaddr = "0xffff_0000_0008_0000" # uint
# Linear mapping offset, for quick conversions between physical and virtual
# addresses.
phys-virt-offset = "0xffff_0000_0000_0000"
# Offset of bus address and phys address.
phys-bus-offset = "0xC0000000"
phys-virt-offset = "0xffff_0000_0000_0000" # uint
# Offset of bus address and phys address. some boards, the bus address is
# different from the physical address.
phys-bus-offset = 0xC0000000 # uint
# Kernel address space base.
kernel-aspace-base = "0xffff_0000_0000_0000"
kernel-aspace-base = "0xffff_0000_0000_0000" # uint
# Kernel address space size.
kernel-aspace-size = "0x0000_ffff_ffff_f000"
kernel-aspace-size = "0x0000_ffff_ffff_f000" # uint

#
# Device specifications
#
[devices]
# MMIO regions with format (`base_paddr`, `size`).
mmio-regions = [
["0xFE20_1000", "0x1000"], # PL011 UART
["0xFF84_1000", "0x8000"], # GICv2
]
virtio-mmio-regions = []
[0xFE20_1000, 0x1000], # PL011 UART
[0xFE34_0000, 0x1000], # eMMC
[0xFF84_1000, 0x1000], # GICv2
] # [(uint, uint)]
# VirtIO MMIO regions with format (`base_paddr`, `size`).
virtio-mmio-regions = [] # [(uint, uint)]

# UART Address
uart-paddr = "0xFE20_1000"
uart-irq = "0x79"
uart-paddr = 0xFE20_1000 # uint
# UART IRQ number
uart-irq = 0x79 # uint

# GIC Address
gicc-paddr = "0xFF84_2000"
gicd-paddr = "0xFF84_1000"
# GIC CPU Interface base address
gicc-paddr = 0xFF84_2000 # uint
# GIC Distributor base address
gicd-paddr = 0xFF84_1000 # uint

# RTC (PL031) Address (Need to read from DTB).
rtc-paddr = "0x0"
rtc-paddr = 0x0 # uint
2 changes: 1 addition & 1 deletion configs/platforms/riscv64-qemu-virt.toml
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Expand Up @@ -62,7 +62,7 @@ pci-bus-end = 0xff # uint
pci-ranges = [
[0x0300_0000, 0x1_0000], # PIO space
[0x4000_0000, 0x4000_0000], # 32-bit MMIO space
[0x4_0000_0000, 0x4_0000_0000], # 64-but MMIO space
[0x4_0000_0000, 0x4_0000_0000], # 64-bit MMIO space
] # [(uint, uint)]

# Timer interrupt frequency in Hz.
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