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arm: dts: Add device tree for ADAQ7768-1 on ZedBoard
Enables using the ADAQ7768-1 device on ZedBoard with FMC connector. Signed-off-by: Jonathan Santos <[email protected]>
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Analog Devices ADAQ7768-1 | ||
* https://wiki.analog.com/resources/eval/user-guides/ad7768-1 | ||
* | ||
* hdl_project: <ad77681evb/zed> | ||
* board_revision: <B> | ||
* | ||
* Copyright (C) 2024 Analog Devices Inc. | ||
*/ | ||
/dts-v1/; | ||
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#include "zynq-zed.dtsi" | ||
#include "zynq-zed-adv7511.dtsi" | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
#include <dt-bindings/gpio/gpio.h> | ||
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/ { | ||
vref: regulator-vref { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fixed-supply"; | ||
regulator-min-microvolt = <4096000>; | ||
regulator-max-microvolt = <4096000>; | ||
regulator-always-on; | ||
}; | ||
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clocks { | ||
ad7768_1_mclk: clock@0 { | ||
#clock-cells = <0>; | ||
compatible = "fixed-clock"; | ||
clock-frequency = <16384000>; | ||
}; | ||
}; | ||
}; | ||
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&fpga_axi { | ||
rx_dma: rx-dmac@0x44a30000 { | ||
compatible = "adi,axi-dmac-1.00.a"; | ||
reg = <0x44a30000 0x1000>; | ||
#dma-cells = <1>; | ||
interrupt-parent = <&intc>; | ||
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clkc 16>; | ||
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adi,channels { | ||
#size-cells = <0>; | ||
#address-cells = <1>; | ||
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dma-channel@0 { | ||
reg = <0>; | ||
adi,source-bus-width = <32>; | ||
adi,source-bus-type = <1>; | ||
adi,destination-bus-width = <64>; | ||
adi,destination-bus-type = <0>; | ||
}; | ||
}; | ||
}; | ||
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spi_clock: spieng-axi-clkgen@44a70000 { | ||
compatible = "adi,axi-clkgen-2.00.a"; | ||
reg = <0x44a70000 0x10000>; | ||
#clock-cells = <0>; | ||
clocks = <&clkc 15>, <&clkc 16>; | ||
clock-names = "s_axi_aclk", "clkin1"; | ||
}; | ||
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axi_spi_engine_0: spi@0x44a00000 { | ||
compatible = "adi-ex,axi-spi-engine-1.00.a"; | ||
reg = <0x44a00000 0x1000>; | ||
interrupt-parent = <&intc>; | ||
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&clkc 15 &spi_clock>; | ||
clock-names = "s_axi_aclk", "spi_clk"; | ||
num-cs = <1>; | ||
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#address-cells = <0x1>; | ||
#size-cells = <0x0>; | ||
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adaq7768_1: adc@0 { | ||
compatible = "adi,adaq7768-1"; | ||
reg = <0>; | ||
spi-max-frequency = <40000000>; | ||
spi-cpol; | ||
spi-cpha; | ||
vref-supply = <&vref>; | ||
adi,sync-in-spi; | ||
reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>; | ||
clocks = <&ad7768_1_mclk>; | ||
clock-names = "mclk"; | ||
dmas = <&rx_dma 0>; | ||
dma-names = "rx"; | ||
#io-channel-cells = <1>; | ||
}; | ||
}; | ||
}; |