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arm64: dts: zynqmp-jupiter-sdr: properly use clk-gpio mux
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In jupiter we have a gpio to toggle between a 38.4 and 30.72MHz reference
clock. We had a gpio-hog to default to the 38.4MHz source and then we
need to manually change the GPIO value when applying a profile for the
other reference. This is far from ideal and more importantly, with commit
c2edc62 ("iio: adc: adrv9002: check and allow to change ref_clk"),
we now try to change the refclk according with the rate we get from the
profile (which makes sense). Therefore, with the current DT, we would fail
to load the 30.72MHz reference clock based profile. Hence, let's make use
of the clk-gpio driver and define our reference clock to be a clk-gpio mux
with two parents for the rates we want. With this, we can change clock
sources solely by loading the profile without any other manual step for
the GPIO.

Signed-off-by: Nuno Sa <[email protected]>
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nunojsa committed Sep 17, 2024
1 parent 8ba3937 commit 1c0e2c3
Showing 1 changed file with 27 additions and 7 deletions.
34 changes: 27 additions & 7 deletions arch/arm64/boot/dts/xilinx/zynqmp-jupiter-sdr.dts
Original file line number Diff line number Diff line change
Expand Up @@ -404,13 +404,6 @@
line-name = "usb-reset";
};

adrv9002_clksrc {
gpio-hog;
gpios = <79 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "adrv9002-clksrc";
};

fan_ctl {
gpio-hog;
gpios = <145 GPIO_ACTIVE_HIGH>;
Expand Down Expand Up @@ -600,10 +593,37 @@

#include "adi-adrv9002.dtsi"

/ {
clocks {
adrv9002_clkin2: clock2 {
compatible = "fixed-clock";

clock-frequency = <30720000>;
clock-output-names = "adrv9002_refclk_mux0";
#clock-cells = <0>;
};
};

adrv9002_clk_mux: clk-mux {
#clock-cells = <0>;
compatible = "gpio-mux-clock";
/* 30.72MHz, 38.4MHz */
clocks = <&adrv9002_clkin2>, <&adrv9002_clkin>;
clock-output-names = "adrv9002_ext_refclk";
select-gpios = <&gpio 79 GPIO_ACTIVE_HIGH>;
};
};

&adrv9002_clkin {
clock-output-names = "adrv9002_refclk_mux1";
};

&adc0_adrv9002 {
reset-gpios = <&gpio 81 GPIO_ACTIVE_LOW>;
interrupts = <78 IRQ_TYPE_EDGE_RISING>;

clocks = <&adrv9002_clk_mux>;

adi,channels {
rx@0 {
mux-ctl-gpios = <&gpio 86 GPIO_ACTIVE_HIGH>;
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