Update Zephyr MSDK Hal based on MSDK PR: analogdevicesinc/msdk#1023

MAX/CMakeLists.txt

@@ -40,6 +40,7 @@ set(MSDK_PERIPH_INC_DIR  ${MSDK_PERIPH_DIR}/Include/${TARGET_UC})
 
 zephyr_include_directories(
     ./Include
+    ${MSDK_LIBRARY_DIR}/CMSIS/Include
     ${MSDK_CMSIS_DIR}/Include
     ${MSDK_PERIPH_INC_DIR}
 )

MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Include/max32665.h

@@ -21,6 +21,8 @@
 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_MAX32665_H_
 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_MAX32665_H_
 
+// clang-format off
+
 #ifndef TARGET_NUM
 #define TARGET_NUM 32665
 #endif
@@ -178,15 +180,16 @@ typedef enum {
 /* ================================================================================ */
 
 /* ----------------------  Configuration of the Cortex-M Processor and Core Peripherals  ---------------------- */
-#define __CM4_REV 0x0100 /*!< Cortex-M4 Core Revision                                */
-#define __MPU_PRESENT 1 /*!< MPU present or not                                     */
-#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels                */
-#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used           */
-#define __FPU_PRESENT 1 /*!< FPU present or not                                     */
+#define __CM4_REV 0x0100            /*!< Cortex-M4 Core Revision                                */
+#define __MPU_PRESENT 1             /*!< MPU present or not                                     */
+#define __NVIC_PRIO_BITS 3          /*!< Number of Bits used for Priority Levels                */
+#define __Vendor_SysTickConfig 0    /*!< Set to 1 if different SysTick Config is used           */
+#define __FPU_PRESENT 1             /*!< FPU present or not                                     */
 
-#include <core_cm4.h> /*!< Cortex-M4 processor and core peripherals               */
+#include <core_cm4.h>               /*!< Cortex-M4 processor and core peripherals               */
 
-#include "system_max32665.h" /*!< System Header                                          */
+#include "system_max32665.h"        /*!< System Header                                          */
+#include "system_core1_max32665.h"  /*!< System Header for Core 1                               */
 
 /* ================================================================================ */
 /* ==================       Device Specific Memory Section       ================== */

MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Include/system_core1_max32665.h

@@ -0,0 +1,59 @@
+/******************************************************************************
+ *
+ * Copyright (C) 2024 Analog Devices, Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************/
+
+#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_
+#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/**
+ * @brief   Start Core 1 code.
+ */
+void Start_Core1(void);
+
+/**
+ * @brief   Stops Core 1 by disabling CPU1 clock.
+ */
+void Stop_Core1(void);
+
+/**
+ * @brief   Main function for Core 1 Code.
+ *          The user should override this function in their application code.
+ */
+int main_core1(void);
+
+/**
+ * @brief   Equivalent to PreInit for Core 0,
+ *          Can be used for preliminary initialization.
+ */
+void PreInit_Core1(void);
+
+/**
+ * @brief   Initialize the system for Core 1.
+ */
+void SystemInit_Core1(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_SYSTEM_CORE1_MAX32665_H_

MAX/Libraries/PeriphDrivers/Source/CORE1/system_core1.c → MAX/Libraries/CMSIS/Device/Maxim/MAX32665/Source/system_core1_max32665.c

@@ -18,64 +18,66 @@
  *
  ******************************************************************************/
 
-/**
- * @file    core1startup.c
- * @brief   Startup Code for MAX32665 Family CPU1
- * @details These functions are called at the startup of the second ARM core (CPU1/Core1)
- */
 #include <string.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include "max32665.h"
+#include "mxc_device.h"
 #include "mxc_sys.h"
 #include "gcr_regs.h"
-#include "icc_regs.h"
-#include "pwrseq_regs.h"
 
-extern uint32_t __isr_vector_core1;
+extern void (*const __isr_vector_core1[])(void);
 
-void Core1_Start(void)
+void Start_Core1(void)
 {
-    MXC_GCR->gp0 = (uint32_t)(&__isr_vector_core1);
+    // Save Core 1 vector table location in GCR.
+    MXC_GCR->gp0 = (uint32_t)&__isr_vector_core1;
     MXC_GCR->perckcn1 &= ~MXC_F_GCR_PERCKCN1_CPU1D;
 }
 
-void Core1_Stop(void)
+void Stop_Core1(void)
 {
     MXC_GCR->perckcn1 |= MXC_F_GCR_PERCKCN1_CPU1D;
 }
 
-__weak int Core1_Main(void)
+/**
+ * The user declares this in application code.
+ */
+__weak int main_core1(void)
 {
-    // The user should declare this in application code, so we'll just spin
     while (1) {}
 }
+
+/**
+ * You may over-ride this function in your program by defining a custom 
+ *  PreInit_Core1().
+ */
 __weak void PreInit_Core1(void)
 {
     return;
 }
 
+/**
+ * This function is called just before control is transferred to main()
+ *  on Core 1.
+ *
+ * You may over-ride this function in your program by defining a custom 
+ *  SystemInit(), but care should be taken to reproduce the initialization
+ *  steps or a non-functional system may result.
+ */
 __weak void SystemInit_Core1(void)
 {
-    /* Configure the interrupt controller to use the application vector table in
-     * the application space */
+    /**
+     * Configure the interrupt controller to use the application vector 
+     *  table in flash. Initially, VTOR points to the ROM's table.
+     */
     SCB->VTOR = (uint32_t)&__isr_vector_core1;
 
-    /* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11
-     * Grant full access, per "Table B3-24 CPACR bit assignments".
-     * DDI0403D "ARMv7-M Architecture Reference Manual" */
+    /**
+     * Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11
+     *  Grant full access, per "Table B3-24 CPACR bit assignments".
+     *  DDI0403D "ARMv7-M Architecture Reference Manual"
+     */
     SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
     __DSB();
     __ISB();
-
-    // Enable ICache1 Clock
-    MXC_GCR->perckcn1 &= ~(1 << 22);
-
-    // Invalidate cache and wait until ready
-    MXC_ICC1->invalidate = 1;
-    while (!(MXC_ICC1->cache_ctrl & MXC_F_ICC_CACHE_CTRL_RDY)) {}
-
-    // Enable Cache
-    MXC_ICC1->cache_ctrl |= MXC_F_ICC_CACHE_CTRL_EN;
-    while (!(MXC_ICC1->cache_ctrl & MXC_F_ICC_CACHE_CTRL_RDY)) {}
 }

MAX/Libraries/PeriphDrivers/Include/MAX32665/core1.h

@@ -25,6 +25,12 @@
 extern "C" {
 #endif
 
+#include "mxc_device.h"
+
+#warning "core1.h is deprecated (05-24-2024)."
+#warning "Use mxc_device.h instead, and set `ARM_DUALCORE=1` in project.mk"
+#warning "Core 1 Startup/System code is located at Libraries/CMSIS/Device/Maxim/MAX32665/"
+
 /**
  * @file    core1.h
  * @brief   Startup Code for MAX32665 Family CPU1
@@ -35,32 +41,36 @@ extern "C" {
  * @brief Starts the code on core 1
  *        Core1 code beings executing from Core1_Main()
  */
-void Core1_Start(void);
+#if defined(__GNUC__)
+inline __attribute__((deprecated("Use Start_Core1(); instead."))) void Core1_Start(void)
+{
+    Start_Core1();
+}
+#endif
 
 /**
  * @brief Stops code executing in Core 1
  */
-void Core1_Stop(void);
+#if defined(__GNUC__)
+inline __attribute__((deprecated("Use Stop_Core1(); instead."))) void Core1_Stop(void)
+{
+    Stop_Core1();
+}
+#endif
 
 /**
  * @brief Main function for Core 1 Code
  *        The user should override this function
  *        in their application code
  */
-int Core1_Main(void);
-
-/**
- * @brief Equivalent to PreInit for Core 0
- *        Can be used for preliminary initialization
- */
-void PreInit_Core1(void);
+#if defined(__GNUC__)
+inline __attribute__((deprecated(
+    "Use `int main_core1(void)` instead - main_core1 is Core 1's entry point where code starts, not Core1_Main."))) int
+Core1_Main(void);
+#endif
 
-/**
- * @brief Equivalent to PreInit for Core 1
- *        Enables FPU, and ICache
- *        Sets interrupt vector
- */
-void SystemInit_Core1(void);
+// void PreInit_Core1(void) is now located in system_core_max32665.h
+// void SystemInit_Core1(void) is now located in system_core_max32665.h
 
 #ifdef __cplusplus
 }