hw debug api wip: some cleanup

Signed-off-by: Alwin Joshy <[email protected]>

include/arch/arm/arch/32/mode/machine/debug.h

@@ -406,10 +406,6 @@ static inline void initHDCR(void)
 
 #ifdef CONFIG_HARDWARE_DEBUG_API
 
-
-
 bool_t byte8WatchpointsSupported(void);
 
-
-
 #endif /* CONFIG_HARDWARE_DEBUG_API */

include/arch/arm/arch/64/mode/fastpath/fastpath.h

@@ -139,6 +139,10 @@ static inline void NORETURN FORCE_INLINE fastpath_restore(word_t badge, word_t m
 
     c_exit_hook();
 
+#ifdef ARM_CP14_SAVE_AND_RESTORE_NATIVE_THREADS
+    restore_user_debug_context(cur_thread);
+#endif
+
 #ifdef CONFIG_HAVE_FPU
     lazyFPURestore(cur_thread);
 #endif /* CONFIG_HAVE_FPU */

include/arch/arm/arch/machine/debug.h

@@ -95,7 +95,10 @@ void restore_user_debug_context(tcb_t *target_thread);
 void saveAllBreakpointState(tcb_t *t);
 void loadAllDisabledBreakpointState(void);
 
-
+#ifdef ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS
+void Arch_debugAssociateVCPUTCB(tcb_t *t);
+void Arch_debugDissociateVCPUTCB(tcb_t *t);
+#endif
 
 DEBUG_GENERATE_READ_FN(readBcrCp, DBGBCR)
 DEBUG_GENERATE_READ_FN(readBvrCp, DBGBVR)

include/arch/arm/armv/armv8-a/64/armv/vcpu.h

@@ -641,6 +641,30 @@ static inline void vcpu_enable(vcpu_t *vcpu)
     isb();
 
     set_gic_vcpu_ctrl_hcr(vcpu->vgic.hcr);
+
+#if !defined(ARM_CP14_SAVE_AND_RESTORE_NATIVE_THREADS) && defined(ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS)
+    /* This is guarded by an #ifNdef (negation) ARM_CP14_SAVE_AND_RESTORE_NATIVE_THREADS
+     * because if it wasn't, we'd be calling restore_user_debug_context twice
+     * on a debug-API build; recall that restore_user_debug_context is called
+     * in restore_user_context.
+     *
+     * We call restore_user_debug_context here, because vcpu_restore calls this
+     * function (vcpu_enable). It's better to embed the
+     * restore_user_debug_context call in here than to call it in the outer
+     * level caller (vcpu_switch), because if the structure of this VCPU code
+     * changes later on, it will be less likely that the person who changes
+     * the code will be able to omit the debug register context restore, if
+     * it's done here.
+     */
+    restore_user_debug_context(vcpu->vcpuTCB);
+#endif
+#if defined(ARM_HYP_TRAP_CP14_IN_NATIVE_USER_THREADS)
+    /* Disable debug exception trapping and let the PL1 Guest VM handle all
+     * of its own debug faults.
+     */
+    setHDCRTrapDebugExceptionState(false);
+#endif
+
 #ifdef CONFIG_HAVE_FPU
     vcpu_restore_reg(vcpu, seL4_VCPUReg_CPACR);
 #endif
@@ -672,6 +696,21 @@ static inline void vcpu_disable(vcpu_t *vcpu)
     setHCR(HCR_NATIVE);
     isb();
 
+#if defined(ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS)
+    /* Disable all breakpoint registers from triggering their
+     * respective events, so that when we switch from a guest VM
+     * to a native thread, the native thread won't trigger events
+     * that were caused by things the guest VM did.
+     */
+    loadAllDisabledBreakpointState();
+#endif
+#if defined(ARM_HYP_TRAP_CP14_IN_NATIVE_USER_THREADS)
+    /* Enable debug exception trapping and let seL4 trap all PL0 (user) native
+     * seL4 threads' debug exceptions, so it can deliver them as fault messages.
+     */
+    setHDCRTrapDebugExceptionState(true);
+#endif
+
 #ifdef CONFIG_HAVE_FPU
     /* Allow FPU instructions in EL0 and EL1 for native
      * threads by setting the CPACR_EL1. The CPTR_EL2 is

src/arch/arm/32/machine/debug.c

@@ -779,23 +779,7 @@ seL4_Fault_t handleUserLevelDebugException(word_t fault_vaddr)
 #endif /* CONFIG_HARDWARE_DEBUG_API */
 
 #ifdef ARM_BASE_CP14_SAVE_AND_RESTORE
-#ifdef ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS
-void Arch_debugAssociateVCPUTCB(tcb_t *t)
-{
-    /* Don't attempt to shift beyond end of word. */
-    assert(seL4_NumHWBreakpoints < sizeof(word_t) * 8);
-
-    /* Set all the bits to 1, so loadBreakpointState() will
-     * restore all the debug regs unconditionally.
-     */
-    t->tcbArch.tcbContext.breakpointState.used_breakpoints_bf = MASK(seL4_NumHWBreakpoints);
-}
 
-void Arch_debugDissociateVCPUTCB(tcb_t *t)
-{
-    t->tcbArch.tcbContext.breakpointState.used_breakpoints_bf = 0;
-}
-#endif
 
 /** Pops debug register context for a thread into the CPU.
  *

src/arch/arm/machine/debug.c

@@ -6,6 +6,24 @@
 
 #ifdef ARM_BASE_CP14_SAVE_AND_RESTORE
 
+#ifdef ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS
+void Arch_debugAssociateVCPUTCB(tcb_t *t)
+{
+    /* Don't attempt to shift beyond end of word. */
+    assert(seL4_NumHWBreakpoints < sizeof(word_t) * 8);
+
+    /* Set all the bits to 1, so loadBreakpointState() will
+     * restore all the debug regs unconditionally.
+     */
+    t->tcbArch.tcbContext.breakpointState.used_breakpoints_bf = MASK(seL4_NumHWBreakpoints);
+}
+
+void Arch_debugDissociateVCPUTCB(tcb_t *t)
+{
+    t->tcbArch.tcbContext.breakpointState.used_breakpoints_bf = 0;
+}
+#endif
+
 /** Mirrors Arch_initFpuContext.
  *
  * Zeroes out the BVR thread context and preloads reserved bit values from the