pulley: Implement integer vector comparisons

More wast tests passing.
alexcrichton · Dec 18, 2024 · 07ae3c8 · 07ae3c8
1 parent 1ba6b66
commit 07ae3c8
Show file tree

Hide file tree

Showing 14 changed files with 394 additions and 7 deletions.
diff --git a/cranelift/codegen/src/isa/pulley_shared/lower.isle b/cranelift/codegen/src/isa/pulley_shared/lower.isle
@@ -510,6 +510,47 @@
 (rule (lower_icmp128_hi (IntCC.SignedLessThan) a b) (pulley_xslt64 a b))
 (rule (lower_icmp128_hi (IntCC.UnsignedLessThan) a b) (pulley_xult64 a b))
 
+;; vector comparisons
+
+(rule 1 (lower (icmp cc a @ (value_type (ty_vec128 ty)) b))
+  (lower_vcmp ty cc a b))
+
+(decl lower_vcmp (Type IntCC Value Value) VReg)
+(rule (lower_vcmp $I8X16 (IntCC.Equal) a b) (pulley_veq8x16 a b))
+(rule (lower_vcmp $I8X16 (IntCC.NotEqual) a b) (pulley_vneq8x16 a b))
+(rule (lower_vcmp $I8X16 (IntCC.SignedLessThan) a b) (pulley_vslt8x16 a b))
+(rule (lower_vcmp $I8X16 (IntCC.SignedLessThanOrEqual) a b) (pulley_vslteq8x16 a b))
+(rule (lower_vcmp $I8X16 (IntCC.UnsignedLessThan) a b) (pulley_vult8x16 a b))
+(rule (lower_vcmp $I8X16 (IntCC.UnsignedLessThanOrEqual) a b) (pulley_vulteq8x16 a b))
+(rule (lower_vcmp $I16X8 (IntCC.Equal) a b) (pulley_veq16x8 a b))
+(rule (lower_vcmp $I16X8 (IntCC.NotEqual) a b) (pulley_vneq16x8 a b))
+(rule (lower_vcmp $I16X8 (IntCC.SignedLessThan) a b) (pulley_vslt16x8 a b))
+(rule (lower_vcmp $I16X8 (IntCC.SignedLessThanOrEqual) a b) (pulley_vslteq16x8 a b))
+(rule (lower_vcmp $I16X8 (IntCC.UnsignedLessThan) a b) (pulley_vult16x8 a b))
+(rule (lower_vcmp $I16X8 (IntCC.UnsignedLessThanOrEqual) a b) (pulley_vulteq16x8 a b))
+(rule (lower_vcmp $I32X4 (IntCC.Equal) a b) (pulley_veq32x4 a b))
+(rule (lower_vcmp $I32X4 (IntCC.NotEqual) a b) (pulley_vneq32x4 a b))
+(rule (lower_vcmp $I32X4 (IntCC.SignedLessThan) a b) (pulley_vslt32x4 a b))
+(rule (lower_vcmp $I32X4 (IntCC.SignedLessThanOrEqual) a b) (pulley_vslteq32x4 a b))
+(rule (lower_vcmp $I32X4 (IntCC.UnsignedLessThan) a b) (pulley_vult32x4 a b))
+(rule (lower_vcmp $I32X4 (IntCC.UnsignedLessThanOrEqual) a b) (pulley_vulteq32x4 a b))
+(rule (lower_vcmp $I64X2 (IntCC.Equal) a b) (pulley_veq64x2 a b))
+(rule (lower_vcmp $I64X2 (IntCC.NotEqual) a b) (pulley_vneq64x2 a b))
+(rule (lower_vcmp $I64X2 (IntCC.SignedLessThan) a b) (pulley_vslt64x2 a b))
+(rule (lower_vcmp $I64X2 (IntCC.SignedLessThanOrEqual) a b) (pulley_vslteq64x2 a b))
+(rule (lower_vcmp $I64X2 (IntCC.UnsignedLessThan) a b) (pulley_vult64x2 a b))
+(rule (lower_vcmp $I64X2 (IntCC.UnsignedLessThanOrEqual) a b) (pulley_vulteq64x2 a b))
+
+;; Sweap operand order of ops pulley doesn't support
+(rule (lower_vcmp ty cc @ (IntCC.SignedGreaterThan) a b)
+  (lower_vcmp ty (intcc_swap_args cc) b a))
+(rule (lower_vcmp ty cc @ (IntCC.SignedGreaterThanOrEqual) a b)
+  (lower_vcmp ty (intcc_swap_args cc) b a))
+(rule (lower_vcmp ty cc @ (IntCC.UnsignedGreaterThan) a b)
+  (lower_vcmp ty (intcc_swap_args cc) b a))
+(rule (lower_vcmp ty cc @ (IntCC.UnsignedGreaterThanOrEqual) a b)
+  (lower_vcmp ty (intcc_swap_args cc) b a))
+
 ;;;; Rules for `fcmp` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 (rule (lower (fcmp cc a b @ (value_type (ty_scalar_float ty))))

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-eq.clif b/cranelift/filetests/filetests/runtests/simd-icmp-eq.clif
@@ -7,6 +7,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_eq_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-ne.clif b/cranelift/filetests/filetests/runtests/simd-icmp-ne.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_ne_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-sge.clif b/cranelift/filetests/filetests/runtests/simd-icmp-sge.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_sge_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-sgt.clif b/cranelift/filetests/filetests/runtests/simd-icmp-sgt.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_sgt_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-sle.clif b/cranelift/filetests/filetests/runtests/simd-icmp-sle.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_sle_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-slt.clif b/cranelift/filetests/filetests/runtests/simd-icmp-slt.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_slt_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-uge.clif b/cranelift/filetests/filetests/runtests/simd-icmp-uge.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_uge_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-ugt.clif b/cranelift/filetests/filetests/runtests/simd-icmp-ugt.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_ugt_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-ule.clif b/cranelift/filetests/filetests/runtests/simd-icmp-ule.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_ule_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/cranelift/filetests/filetests/runtests/simd-icmp-ult.clif b/cranelift/filetests/filetests/runtests/simd-icmp-ult.clif
@@ -9,6 +9,10 @@ target s390x
 set enable_multi_ret_implicit_sret
 target riscv64 has_v
 target riscv64 has_v has_c has_zcb
+target pulley32
+target pulley32be
+target pulley64
+target pulley64be
 
 function %simd_icmp_ult_i8(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

diff --git a/crates/wast-util/src/lib.rs b/crates/wast-util/src/lib.rs
@@ -402,21 +402,18 @@ impl WastTest {
         if config.compiler == Compiler::CraneliftPulley {
             let unsupported = [
                 "misc_testsuite/simd/canonicalize-nan.wast",
-                "misc_testsuite/simd/issue6725-no-egraph-panic.wast",
                 "misc_testsuite/simd/issue_3327_bnot_lowering.wast",
                 "misc_testsuite/simd/v128-select.wast",
                 "spec_testsuite/proposals/annotations/simd_lane.wast",
                 "spec_testsuite/proposals/relaxed-simd/i16x8_relaxed_q15mulr_s.wast",
                 "spec_testsuite/proposals/relaxed-simd/i32x4_relaxed_trunc.wast",
                 "spec_testsuite/proposals/relaxed-simd/i8x16_relaxed_swizzle.wast",
                 "spec_testsuite/proposals/relaxed-simd/relaxed_dot_product.wast",
-                "spec_testsuite/proposals/relaxed-simd/relaxed_laneselect.wast",
                 "spec_testsuite/proposals/relaxed-simd/relaxed_madd_nmadd.wast",
                 "spec_testsuite/proposals/relaxed-simd/relaxed_min_max.wast",
                 "spec_testsuite/proposals/memory64/simd_lane.wast",
                 "spec_testsuite/proposals/memory64/relaxed_min_max.wast",
                 "spec_testsuite/proposals/memory64/relaxed_madd_nmadd.wast",
-                "spec_testsuite/proposals/memory64/relaxed_laneselect.wast",
                 "spec_testsuite/proposals/memory64/relaxed_dot_product.wast",
                 "spec_testsuite/proposals/memory64/i16x8_relaxed_q15mulr_s.wast",
                 "spec_testsuite/proposals/memory64/i32x4_relaxed_trunc.wast",
@@ -433,23 +430,19 @@ impl WastTest {
                 "spec_testsuite/simd_f64x2_rounding.wast",
                 "spec_testsuite/simd_i16x8_arith.wast",
                 "spec_testsuite/simd_i16x8_arith2.wast",
-                "spec_testsuite/simd_i16x8_cmp.wast",
                 "spec_testsuite/simd_i16x8_extadd_pairwise_i8x16.wast",
                 "spec_testsuite/simd_i16x8_q15mulr_sat_s.wast",
                 "spec_testsuite/simd_i16x8_sat_arith.wast",
                 "spec_testsuite/simd_i32x4_arith.wast",
                 "spec_testsuite/simd_i32x4_arith2.wast",
-                "spec_testsuite/simd_i32x4_cmp.wast",
                 "spec_testsuite/simd_i32x4_dot_i16x8.wast",
                 "spec_testsuite/simd_i32x4_extadd_pairwise_i16x8.wast",
                 "spec_testsuite/simd_i32x4_trunc_sat_f32x4.wast",
                 "spec_testsuite/simd_i32x4_trunc_sat_f64x2.wast",
                 "spec_testsuite/simd_i64x2_arith.wast",
                 "spec_testsuite/simd_i64x2_arith2.wast",
-                "spec_testsuite/simd_i64x2_cmp.wast",
                 "spec_testsuite/simd_i8x16_arith.wast",
                 "spec_testsuite/simd_i8x16_arith2.wast",
-                "spec_testsuite/simd_i8x16_cmp.wast",
                 "spec_testsuite/simd_i8x16_sat_arith.wast",
                 "spec_testsuite/simd_lane.wast",
                 "spec_testsuite/simd_load.wast",