dynMM: Linting

Signed-off-by: aziz bahri <[email protected]>
Xilinx · Dec 17, 2024 · 5cdbbec · 5cdbbec
1 parent ed79c0a
commit 5cdbbec
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Showing 5 changed files with 26 additions and 26 deletions.
diff --git a/finn-rtllib/mvu/mv_matrix_load.sv b/finn-rtllib/mvu/mv_matrix_load.sv
@@ -263,7 +263,7 @@ always_comb begin : DP_PROC_WR
                 end
             end
         end
-        
+
     endcase
 end
 
@@ -342,7 +342,7 @@ always_comb begin : NSL_PROC_RD
                     end
                 end
             end
-        
+
     endcase
 end
 
@@ -408,7 +408,7 @@ assign odat = odat_C;
 
 for(genvar i = 0; i < PE; i++) begin
     for(genvar j = 0; j < SIMD; j++) begin
-        ram_p_c #( 
+        ram_p_c #(
             .ADDR_BITS($clog2(NF*SF)),
             .DATA_BITS(RAM_BITS),
             .RAM_TYPE("distributed")
@@ -428,7 +428,7 @@ end
 
 for(genvar i = 0; i < PE; i++) begin
     for(genvar j = 0; j < SIMD; j++) begin
-        ram_p_c #( 
+        ram_p_c #(
             .ADDR_BITS($clog2(NF*SF)),
             .DATA_BITS(RAM_BITS),
             .RAM_TYPE("distributed")

diff --git a/finn-rtllib/mvu/mv_matrix_load_tmp.sv b/finn-rtllib/mvu/mv_matrix_load_tmp.sv
@@ -185,15 +185,15 @@ always_comb begin : DP_PROC_WR
     curr_simd_N = curr_simd_C;
 
     for(int i = 0; i < 2; i++)
-        rd_N[i] = done[i] ? 1'b0 : rd_C[i]; 
+        rd_N[i] = done[i] ? 1'b0 : rd_C[i];
 
     // Input
     irdy = 1'b0;
 
     // Buffers
     a_we = 0;
     for(int i = 0; i < 2; i++) begin
-        a_addr[i] = offsets[curr_nf_C] + curr_sf_C;   
+        a_addr[i] = offsets[curr_nf_C] + curr_sf_C;
         for(int j = 0; j < PE; j++)
             for(int k = 0; k < SIMD; k++)
                 a_data_in[i][j][k] = idat[j];
@@ -312,7 +312,7 @@ always_comb begin : DP_PROC_RD
 
     if(rd_C[state_rd_C]) begin
         if(ordy) begin
-            vld_s0_N[state_rd_C] = 1'b1; 
+            vld_s0_N[state_rd_C] = 1'b1;
 
             cons_sfnf_N = (cons_sfnf_C == NF*SF-1) ? 0 : cons_sfnf_C + 1;
             cons_r_N = (cons_sfnf_C == NF*SF-1) ? cons_r_C + 1 : cons_r_C;
@@ -322,7 +322,7 @@ always_comb begin : DP_PROC_RD
                 cons_r_N = 0;
             end
         end
-    end 
+    end
 
 end
 
@@ -336,7 +336,7 @@ assign odat = odat_C;
 for(genvar i = 0; i < 2; i++) begin
     for(genvar j = 0; j < PE; j++) begin
         for(genvar k = 0; k < CU_SIMD; k++) begin
-            ram_p_c #( 
+            ram_p_c #(
                 .ADDR_BITS(WGT_ADDR_BITS),
                 .DATA_BITS(RAM_BITS),
                 .RAM_TYPE("distributed")

diff --git a/finn-rtllib/mvu/mv_matrix_load_wide.sv b/finn-rtllib/mvu/mv_matrix_load_wide.sv
@@ -214,7 +214,7 @@ always_comb begin : DP_PROC_WR
                 end
             end
         end
-        
+
     endcase
 end
 
@@ -293,7 +293,7 @@ always_comb begin : NSL_PROC_RD
                     end
                 end
             end
-        
+
     endcase
 end
 
@@ -355,14 +355,14 @@ for(genvar i = 0; i < PE; i++) begin
     for(genvar j = 0; j < SIMD; j++) begin
         assign odat[i][j] = odat_C[j][i*ACTIVATION_WIDTH+:ACTIVATION_WIDTH];
     end
-end 
+end
 
 // ----------------------------------------------------------------------------
 // Matrix
 // ----------------------------------------------------------------------------
 
 for(genvar i = 0; i < SIMD; i++) begin
-    ram_p_c #( 
+    ram_p_c #(
         .ADDR_BITS($clog2(NF*SF)),
         .DATA_BITS(RAM_BITS),
         .RAM_TYPE("distributed")
@@ -380,7 +380,7 @@ for(genvar i = 0; i < SIMD; i++) begin
 end
 
 for(genvar i = 0; i < SIMD; i++) begin
-    ram_p_c #( 
+    ram_p_c #(
         .ADDR_BITS($clog2(NF*SF)),
         .DATA_BITS(RAM_BITS),
         .RAM_TYPE("distributed")
@@ -397,4 +397,4 @@ for(genvar i = 0; i < SIMD; i++) begin
     );
 end
 
-endmodule
+endmodule
diff --git a/finn-rtllib/mvu/mvu_dyn_axi.sv b/finn-rtllib/mvu/mvu_dyn_axi.sv
@@ -53,7 +53,7 @@ module mvu_dyn_axi #(
     int unsigned ACCU_WIDTH = 2*ACTIVATION_WIDTH+$clog2(MH),
     bit NARROW_WEIGHTS     = 0,
 	bit SIGNED_ACTIVATIONS = 1,
-    
+
     bit PUMPED_COMPUTE = 1,
     bit FORCE_BEHAVIORAL = 0,
 	bit M_REG_LUT = 1,
@@ -66,7 +66,7 @@ module mvu_dyn_axi #(
     localparam int unsigned  OUTPUT_STREAM_WIDTH                = PE * ACCU_WIDTH,
 	localparam int unsigned  OUTPUT_STREAM_WIDTH_BA             = (OUTPUT_STREAM_WIDTH + 7)/8 * 8,
 	localparam bit  		 SIMD_UNEVEN  = SIMD % 2
-) ( 
+) (
     // Global Control
 	input	logic  ap_clk,
 	input	logic  ap_clk2x,	// synchronous, double-speed clock; only used for PUMPED_COMPUTE
@@ -76,7 +76,7 @@ module mvu_dyn_axi #(
 	input	logic [INPUT_1_STREAM_WIDTH_BA-1:0]  s_axis_input_0_tdata,
 	input	logic  s_axis_input_0_tvalid,
 	output	logic  s_axis_input_0_tready,
-    
+
     // Matrix stream - input 2
 	input	logic [INPUT_2_STREAM_WIDTH_BA-1:0]  s_axis_input_1_tdata,
 	input	logic  s_axis_input_1_tvalid,
@@ -110,13 +110,13 @@ mv_matrix_load #(
     .MH(MH), .MW(MW),
     .N_REPS(N_VECTORS)
 ) inst_matrix_load (
-    .clk(ap_clk), 
+    .clk(ap_clk),
     .rst(~ap_rst_n),
-    .ivld(s_axis_input_1_tvalid), 
-    .irdy(s_axis_input_1_tready), 
+    .ivld(s_axis_input_1_tvalid),
+    .irdy(s_axis_input_1_tready),
     .idat(dyn_w_t'(s_axis_input_1_tdata)),
-    .ovld(axis_input_1_tvalid), 
-    .ordy(axis_input_1_tready), 
+    .ovld(axis_input_1_tvalid),
+    .ordy(axis_input_1_tready),
     .odat(axis_input_1_tdata)
 );
 
@@ -157,4 +157,4 @@ mvu_vvu_axi #(
     .m_axis_output_tready       (m_axis_output_tready)
 );
 
-endmodule
+endmodule
diff --git a/finn-rtllib/mvu/ram_p_c.sv b/finn-rtllib/mvu/ram_p_c.sv
@@ -77,10 +77,10 @@ module ram_p_c #(
       a_data_out <= a_data_reg;
     end
     if(b_en) begin
-      b_data_reg <= ram[b_addr]; 
+      b_data_reg <= ram[b_addr];
       b_data_out <= b_data_reg;
     end
    //end
    end
 
-endmodule // ram_p_c
+endmodule // ram_p_c