Merge branch '2023.1' into max_cq_slot_size_2023.1

Xilinx · Jul 18, 2023 · 8ab6e0a · 8ab6e0a
2 parents edaeed5 + 211e224
commit 8ab6e0a
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Showing 14 changed files with 206 additions and 372 deletions.
diff --git a/build/build_edge.sh b/build/build_edge.sh
@@ -67,7 +67,7 @@ install_recipes()
     eval "$SAVED_OPTIONS_LOCAL"
 }
 
-enable_vdu()
+enable_vdu_init()
 {
     VERSAL_PROJECT_DIR=$1
     APU_RECIPES_DIR=$XRT_REPO_DIR/src/runtime_src/tools/scripts/apu_recipes
@@ -88,35 +88,8 @@ enable_vdu()
     cp $INIT_SCRIPT $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/vdu-init/files
 
     # Generate vdu modules and add them to apu package
-
-    # Enable VDU kernel module 
-    VDU_MOD_BB_FILE=$APU_RECIPES_DIR/kernel-module-vdu.bb
-    if [ ! -d $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/kernel-module-vdu ]; then
-        $PETA_BIN/petalinux-config --silentconfig
-        $PETA_BIN/petalinux-create -t apps --template install -n kernel-module-vdu --enable
-    fi
-    cp -rf $VDU_MOD_BB_FILE $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/kernel-module-vdu/
-
-    # Enable VDU firmware 
-    VDU_FIRMWARE_BB_FILE=$APU_RECIPES_DIR/vdu-firmware.bb
-    if [ ! -d $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/vdu-firmware ]; then
-        $PETA_BIN/petalinux-config --silentconfig
-        $PETA_BIN/petalinux-create -t apps --template install -n vdu-firmware --enable
-    fi
-    cp -rf $VDU_FIRMWARE_BB_FILE $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/vdu-firmware/
-
-    # Enable VDU control software library 
-    # This is not required as PS Kernels statically linking with control software, Enabling this to debug standalone control software 
-    VDU_LIBRARY_BB_FILE=$APU_RECIPES_DIR/libvdu-ctrlsw.bb
-    if [ ! -d $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/libvdu-ctrlsw ]; then
-        $PETA_BIN/petalinux-config --silentconfig
-        $PETA_BIN/petalinux-create -t apps --template install -n libvdu-ctrlsw --enable
-    fi
-    cp -rf $VDU_LIBRARY_BB_FILE $VERSAL_PROJECT_DIR/project-spec/meta-user/recipes-apps/libvdu-ctrlsw/
-
     echo "IMAGE_INSTALL:append = \" libvdu-ctrlsw kernel-module-vdu vdu-firmware\""  >> build/conf/local.conf
     echo "MACHINE_FEATURES = \"vdu\""  >> build/conf/local.conf
-    #sed -i '1iMACHINE = \" versal-ai-core-generic \"' build/conf/local.conf
 
 }
 
@@ -384,7 +357,7 @@ if [[ $apu_package == 1 ]]; then
   if [[ $AARCH = $versal_dir ]]; then
     # configure the project with appropriate options
     config_versal_project .
-    enable_vdu .
+    enable_vdu_init .
   fi
 
   echo "[CMD]: petalinux-config -c kernel --silentconfig"
@@ -403,6 +376,7 @@ if [[ $apu_package == 1 ]]; then
   export PATH=$PETALINUX/../../tool/petalinux-v$PETALINUX_VER-final/components/yocto/buildtools/sysroots/x86_64-petalinux-linux/usr/bin:$PATH
   $XRT_REPO_DIR/src/runtime_src/tools/scripts/pkgapu.sh -output $ORIGINAL_DIR/$PETALINUX_NAME/apu_packages -images $ORIGINAL_DIR/$PETALINUX_NAME/images/linux/ -idcode "0x14ca8093" -package-name xrt-apu-vck5000
   $XRT_REPO_DIR/src/runtime_src/tools/scripts/pkgapu.sh -output $ORIGINAL_DIR/$PETALINUX_NAME/apu_packages -images $ORIGINAL_DIR/$PETALINUX_NAME/images/linux/ -idcode "0x04cd7093" -package-name xrt-apu
+  $XRT_REPO_DIR/src/runtime_src/tools/scripts/pkgapu.sh -output $ORIGINAL_DIR/$PETALINUX_NAME/apu_packages -images $ORIGINAL_DIR/$PETALINUX_NAME/images/linux/ -idcode "0x14cd7093" -package-name xrt-apu-v70pq2
 
   # Generate archiver for petalinux project
   if [[ $archiver == 1 ]]; then

diff --git a/build/petalinux.build b/build/petalinux.build
@@ -1,3 +1,3 @@
 # When updating Petalinux build please file a SH ticket to retain the build
 # https://jira.xilinx.com/secure/CreateIssue!default.jspa
-PETALINUX="/proj/petalinux/2023.1/petalinux-v2023.1_03292225//tool/petalinux-v2023.1-final"
+PETALINUX="/proj/petalinux/2023.1/petalinux-v2023.1_05012318/tool/petalinux-v2023.1-final"
diff --git a/src/runtime_src/core/edge/drm/zocl/zocl_ctrl_ert.c b/src/runtime_src/core/edge/drm/zocl/zocl_ctrl_ert.c
@@ -62,6 +62,7 @@
 #define ERT_CQ_IRQ			0
 #define ERT_CU_IRQ			1
 
+#define ZOCL_HOSTMEM_MASK		0xFFFFffff00000000LL
 /*
  * CQ format version 1.0:
  * First word on CQ is version number, followed by ctrl XGQ, which may go up to 1.5k.
@@ -899,7 +900,6 @@ static void zert_cmd_uncfg_cu(struct zocl_ctrl_ert *zert, struct xgq_cmd_sq_hdr
 	init_resp(resp, cmd->cid, rc);
 }
 
-
 static void zert_cmd_query_cu(struct zocl_ctrl_ert *zert, struct xgq_cmd_sq_hdr *cmd,
 			      struct xgq_com_queue_entry *resp)
 {
@@ -957,6 +957,33 @@ static void zert_cmd_query_cu(struct zocl_ctrl_ert *zert, struct xgq_cmd_sq_hdr
 	}
 }
 
+static void zert_cmd_query_mem(struct zocl_ctrl_ert *zert, struct xgq_cmd_sq_hdr *cmd,
+			       struct xgq_com_queue_entry *resp)
+{
+	struct xgq_cmd_query_mem *c = (struct xgq_cmd_query_mem *)cmd;
+	struct xgq_cmd_resp_query_mem *r = (struct xgq_cmd_resp_query_mem *)resp;
+	struct drm_zocl_dev *zdev = zocl_get_zdev();
+
+	init_resp(resp, cmd->cid, 0);
+
+	switch (c->type) {
+        case XGQ_CMD_QUERY_MEM_ADDR:
+		r->l_mem_info = (u32)zdev->host_mem;
+		r->h_mem_info = (u32)((zdev->host_mem & ZOCL_HOSTMEM_MASK) >> 32);
+		break;
+
+	case XGQ_CMD_QUERY_MEM_SIZE:
+		r->l_mem_info = (u32)zdev->host_mem_len;
+		r->h_mem_info = (u32)((zdev->host_mem_len & ZOCL_HOSTMEM_MASK) >> 32);
+		break;
+
+	default:
+		zert_err(zert, "Unknown query mem type: %d", c->type);
+		init_resp(resp, cmd->cid, -EINVAL);
+		break;
+	}
+}
+
 struct zert_ops {
 	u32 op;
 	char *name;
@@ -967,6 +994,7 @@ struct zert_ops {
 	{ XGQ_CMD_OP_CFG_CU, "XGQ_CMD_OP_CFG_CU", zert_cmd_cfg_cu },
 	{ XGQ_CMD_OP_UNCFG_CU, "XGQ_CMD_OP_UNCFG_CU", zert_cmd_uncfg_cu },
 	{ XGQ_CMD_OP_QUERY_CU, "XGQ_CMD_OP_QUERY_CU", zert_cmd_query_cu },
+	{ XGQ_CMD_OP_QUERY_MEM, "XGQ_CMD_OP_QUERY_MEM", zert_cmd_query_mem },
 	{ XGQ_CMD_OP_IDENTIFY, "XGQ_CMD_OP_IDENTIFY", zert_cmd_identify },
 	{ XGQ_CMD_OP_TIMESET, "XGQ_CMD_OP_TIMESET", zert_cmd_timeset }
 };

diff --git a/src/runtime_src/core/include/xgq_cmd_common.h b/src/runtime_src/core/include/xgq_cmd_common.h
@@ -112,6 +112,7 @@ enum xgq_cmd_opcode {
 	XGQ_CMD_OP_DATA_INTEGRITY   	= 0x10e,
 	XGQ_CMD_OP_EXIT             	= 0x10f,
 	XGQ_CMD_OP_UNCFG_CU	        = 0x110,
+	XGQ_CMD_OP_QUERY_MEM	        = 0x111,
 
 	/* Common command type */
 	XGQ_CMD_OP_BARRIER		= 0x200,

diff --git a/src/runtime_src/core/include/xgq_cmd_ert.h b/src/runtime_src/core/include/xgq_cmd_ert.h
@@ -281,6 +281,22 @@ struct xgq_cmd_query_cu {
 	uint32_t rsvd2:8;
 };
 
+/**
+ * struct xgq_cmd_query_mem: query MEM command
+ */
+enum xgq_cmd_query_mem_type {
+	XGQ_CMD_QUERY_MEM_ADDR =	0x0,
+	XGQ_CMD_QUERY_MEM_SIZE =	0x1,
+};
+
+struct xgq_cmd_query_mem {
+	struct xgq_cmd_sq_hdr hdr;
+
+	/* word 2 */
+	uint32_t type:1;
+	uint32_t rsvd1:31;
+};
+
 /**
  * struct xgq_cmd_resp_query_cu: query CU command response
  *
@@ -316,6 +332,25 @@ struct xgq_cmd_resp_query_cu {
 	uint32_t rcode;
 };
 
+/**
+ * struct xgq_cmd_resp_query_mem: query Memory command response
+ *
+ * @status: status of the MEM
+ *
+ * @mem_start_addr: Start address of the memory
+ * @mem_size: memory size
+ *
+ */
+struct xgq_cmd_resp_query_mem {
+       struct xgq_cmd_cq_hdr hdr;
+
+       struct {
+	       uint32_t l_mem_info;
+	       uint32_t h_mem_info;
+       };
+       uint32_t rcode;
+};
+
 /**
  * struct xgq_cmd_resp_clock_calib: query clock counter response
  *

diff --git a/src/runtime_src/core/include/xgq_impl.h b/src/runtime_src/core/include/xgq_impl.h
@@ -1,5 +1,6 @@
 /*
  *  Copyright (C) 2021, Xilinx Inc
+ *  Copyright (C) 2023, Advanced Micro Devices, Inc
  *
  *  This file is dual licensed.  It may be redistributed and/or modified
  *  under the terms of the Apache 2.0 License OR version 2 of the GNU
@@ -198,6 +199,7 @@ struct xgq {
 #define XGQ_NEED_DOUBLE_READ(xgq)	(((xgq)->xq_flags & XGQ_DOUBLE_READ) != 0)
 #define XGQ_IS_IN_MEM_PROD(xgq)		(((xgq)->xq_flags & XGQ_IN_MEM_PROD) != 0)
 
+#define XGQ_INTR_ENABLE_OFFSET 12
 
 /*
  * XGQ implementation details and helper routines.
@@ -379,6 +381,8 @@ xgq_init(struct xgq *xgq, uint64_t flags, uint64_t io_hdl, uint64_t ring_addr,
 	} else {
 		sqprod = sq_produced;
 		cqprod = cq_produced;
+		// Write 1 to GCQ interrupt enable register to always enable interrupt
+		xgq_reg_write32(xgq->xq_io_hdl, cqprod + XGQ_INTR_ENABLE_OFFSET, 1);
 	}
 	xgq_init_ring(xgq, &xgq->xq_sq, sqprod,
 		      ring_addr + offsetof(struct xgq_header, xh_sq_consumed),
@@ -526,6 +530,8 @@ static inline int xgq_attach(struct xgq *xgq, uint64_t flags, uint64_t io_hdl, u
 	} else {
 		sqprod = sq_produced;
 		cqprod = cq_produced;
+		// Write 1 to GCQ interrupt enable register to always enable interrupt
+		xgq_reg_write32(xgq->xq_io_hdl, sqprod + XGQ_INTR_ENABLE_OFFSET, 1);
 	}
 	xgq_init_ring(xgq, &xgq->xq_sq, sqprod,
 		      ring_addr + offsetof(struct xgq_header, xh_sq_consumed),

diff --git a/src/runtime_src/core/pcie/driver/linux/xocl/devices.h b/src/runtime_src/core/pcie/driver/linux/xocl/devices.h
@@ -3447,6 +3447,7 @@ struct xocl_subdev_map {
 	{ XOCL_PCI_DEVID(0x10EE, 0x5044, PCI_ANY_ID, MGMT_VERSAL) },	\
 	{ XOCL_PCI_DEVID(0x10EE, 0x5048, PCI_ANY_ID, VERSAL_MGMT_RAPTOR2) },	\
 	{ XOCL_PCI_DEVID(0x10EE, 0x5094, PCI_ANY_ID, V70_MGMT_RAPTOR2) },	\
+	{ XOCL_PCI_DEVID(0x10EE, 0x50B0, PCI_ANY_ID, V70_MGMT_RAPTOR2) },	\
 	{ XOCL_PCI_DEVID(0x10EE, 0x6098, PCI_ANY_ID, VCK190_MGMT_RAPTOR2) },    \
 	{ XOCL_PCI_DEVID(0x10EE, 0xE098, PCI_ANY_ID, XBB_MFG_VCK190) },		\
 	{ XOCL_PCI_DEVID(0x10EE, 0x5078, PCI_ANY_ID, VERSAL_MGMT_RAPTOR2) },	\
@@ -3525,6 +3526,7 @@ struct xocl_subdev_map {
 	{ XOCL_PCI_DEVID(0x10EE, 0x5045, PCI_ANY_ID, USER_XDMA_VERSAL) },\
 	{ XOCL_PCI_DEVID(0x10EE, 0x5049, PCI_ANY_ID, VERSAL_USER_RAPTOR2) }, \
 	{ XOCL_PCI_DEVID(0x10EE, 0x5095, PCI_ANY_ID, V70_USER_RAPTOR2_ES3) }, \
+	{ XOCL_PCI_DEVID(0x10EE, 0x50B1, PCI_ANY_ID, V70_USER_RAPTOR2_ES3) }, \
 	{ XOCL_PCI_DEVID(0x10EE, 0x6099, PCI_ANY_ID, VCK190_USER_RAPTOR2) }, \
 	{ XOCL_PCI_DEVID(0x10EE, 0x5079, PCI_ANY_ID, VERSAL_USER_RAPTOR2) }, \
 	{ XOCL_PCI_DEVID(0x10EE, 0x5099, PCI_ANY_ID, AVALON_USER_RAPTOR2) }
@@ -3608,6 +3610,14 @@ struct xocl_subdev_map {
 		.vbnv = "xilinx_v70",				\
 		.priv_data = &XOCL_BOARD_V70_USER_RAPTOR2_ES3,	\
 		.type = XOCL_DSAMAP_RAPTOR2 },				\
+	{ 0x10EE, 0x50B0, PCI_ANY_ID,					\
+		.vbnv = "xilinx_v70pq2",				\
+		.priv_data = &XOCL_BOARD_V70_MGMT_RAPTOR2,		\
+		.type = XOCL_DSAMAP_RAPTOR2 },				\
+	{ 0x10EE, 0x50B1, PCI_ANY_ID,					\
+		.vbnv = "xilinx_v70pq2",				\
+		.priv_data = &XOCL_BOARD_V70_USER_RAPTOR2_ES3,	\
+		.type = XOCL_DSAMAP_RAPTOR2 },				\
 	{ 0x10EE, 0x6098, PCI_ANY_ID,					\
                 .vbnv = "xilinx_vck190",				\
                 .priv_data = &XOCL_BOARD_VCK190_MGMT_RAPTOR2,		\

diff --git a/src/runtime_src/core/pcie/driver/linux/xocl/userpf/common.h b/src/runtime_src/core/pcie/driver/linux/xocl/userpf/common.h
@@ -259,6 +259,7 @@ int xocl_kds_register_cus(struct xocl_dev *xdev, int slot_hd, xuid_t *uuid,
 			  struct ip_layout *ip_layout,
 			  struct ps_kernel_node *ps_kernel);
 int xocl_kds_unregister_cus(struct xocl_dev *xdev, int slot_hd);
+int xocl_kds_xgq_query_mem(struct xocl_dev *xdev, struct mem_data *mem_data);
 int xocl_kds_set_cu_read_range(struct xocl_dev *xdev, u32 cu_idx,
 			       u32 start, u32 size);