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This project aims to implement a password cracker on FPGA with Verilog HDL.

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VigneshKarthikV/Password-Cracker-On-FPGA

 
 

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Password Cracker on FPGA

This repository contains a password cracker implemented in Verilog that performs a dictionary attack using various hashing algorithms. The project targets FPGA platforms and is designed to crack passwords in a fast and efficient manner.

Features

  • Supports SHA256.
  • Dictionary attack approach to cracking passwords.

Currently Under Progress:

  • MD4 and MD5 hash algorithms
  • Implementation on an FPGA platform for maximum performance

Requirements

  • FPGA development board
  • Verilog compiler (Vivado)
  • Dictionary file containing possible passwords

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This project aims to implement a password cracker on FPGA with Verilog HDL.

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  • Verilog 100.0%