Minor adaptation of the conditions for breaking out of iterative PCA

VChristiaens · Feb 23, 2025 · 69b4c56 · 69b4c56
1 parent c22d4fa
commit 69b4c56
Showing 1 changed file with 8 additions and 3 deletions.
diff --git a/vip_hci/greedy/ipca_fullfr.py b/vip_hci/greedy/ipca_fullfr.py
@@ -672,7 +672,10 @@ def _blurring_3d(array, mask_center_sz, fwhm_sz=2):
                 # Run PCA on original cube
                 # Update PCA PARAMS
                 pca_params['cube'] = algo_params.cube
-                pca_params['cube_ref'] = ref_cube
+                if algo_params.strategy == 'ADI':
+                    pca_params['cube_ref'] = None
+                else:
+                    pca_params['cube_ref'] = ref_cube
                 pca_params['ncomp'] = final_ncomp[it]
                 pca_params['scaling'] = algo_params.scaling
                 pca_params['cube_sig'] = sig_cube
@@ -749,7 +752,9 @@ def _blurring_3d(array, mask_center_sz, fwhm_sz=2):
                     cond_it = (it % nit_ori != nit_ori-1)
                     if cond_mod and cond_it:
                         cond_skip = True
-                    else:
+                    elif cond_mod:  # in incremental mode don't skip if cond_it
+                        cond_skip = False
+                    else:  # else in non-incremental mode: break or don't smooth
                         cond_skip = False
                         condc = algo_params.continue_without_smooth_after_conv
                         msg = "Convergence criterion met after {} iterations"
@@ -760,7 +765,7 @@ def _blurring_3d(array, mask_center_sz, fwhm_sz=2):
                                 if algo_params.verbose:
                                     print(msg.format(it)+msg2)
                             else:
-                                if algo_params.verbose:
+                                if algo_params.verbose and not cond_it:
                                     print("Final " + msg.format(it))
                                 break
                     if algo_params.strategy == 'RADI':