Updating Branch Predictors to replace hash-map with Fetch Target Queue

.jenkins/build_test_run.sh

@@ -62,16 +62,16 @@ run () {
     echo "Simulation without configuration file argument:"
     cat run
     echo ""
-    compare_outputs "$(grep "retired:" run | rev | cut -d ' ' -f1 | rev)" "6721" "retired instructions"
-    compare_outputs "$(grep "cycles:" run | rev | cut -d ' ' -f1 | rev)" "6721" "simulated cycles"
+    compare_outputs "$(grep " retired:" run | rev | cut -d ' ' -f1 | rev)" "6721" "retired instructions"
+    compare_outputs "$(grep " cycles:" run | rev | cut -d ' ' -f1 | rev)" "6721" "simulated cycles"
     echo ""
 
     ./bin/simeng "$SIMENG_TOP"/configs/tx2.yaml > run
     echo "Simulation with configuration file argument:"
     cat run
     echo ""
-    compare_outputs "$(grep "retired:" run | rev | cut -d ' ' -f1 | rev)" "6724" "retired instructions"
-    compare_outputs "$(grep "cycles:" run | rev | cut -d ' ' -f1 | rev)" "8677" "simulated cycles"
+    compare_outputs "$(grep " retired:" run | rev | cut -d ' ' -f1 | rev)" "6724" "retired instructions"
+    compare_outputs "$(grep " cycles:" run | rev | cut -d ' ' -f1 | rev)" "7496" "simulated cycles"
     echo ""
 }
 

docs/sphinx/developer/components/branchPred.rst

@@ -3,7 +3,7 @@ Branch prediction
 
 SimEng's fetch unit is supplied with an instance of the abstract ``BranchPredictor`` class to enable speculative execution. 
 
-Access to the ``BranchPredictor`` is supported through the ``predict``, ``update``, and ``flush`` functions. ``predict`` provides a branch prediction, both target and direction, ``update`` updates an instructions' prediction, and ``flush`` provides optional algorithm specific flushing functionality.
+Access to the ``BranchPredictor`` is supported through the ``predict``, ``update``, and ``flush`` functions. ``predict`` provides a branch prediction, both target and direction, for a branch instruction. ``update`` updates the branch predictor's prediction mechanism on the actual outcome of a branch. ``flush`` provides algorithm specific flushing functionality.
 
 The ``predict`` function is passed an instruction address, branch type, and a possible known target. The branch type argument currently supports the following types:
 
@@ -17,13 +17,15 @@ The usage of these parameters within a branch predictor's ``predict`` function i
 
 The ``update`` function is passed the branch outcome, the instruction address, and the branch type. From this information, any algorithms or branch structures may be updated.
 
+The state of the branch predictor when ``predict`` is called on a branch is stored in the ``ftq`` to be used by the ``update`` function.  For instance, the perceptron predictor stores the globalHistory and confidence for each prediction, but future predictors may store alternative state. The ``ftq`` is a queue that has an entry for each in-flight branch.  A single entry is added to the back of the ftq on ``predict``, and a single entry is removed from the front of the queue on ``update`` and from the back of the queue on ``flush``.
+
 Generic Predictor
 -----------------
 
 The algorithm(s) held within a ``BranchPredictor`` class instance can be model-specific, however, SimEng provides a ``GenericPredictor`` which contains the following logic.
 
 Global History
-    For indexing relevant prediction structures, a global history can be utilised. The global history value uses n-bits to store the n most recent branch direction outcomes, with the left-most bit being the oldest.
+    For indexing relevant prediction structures, a global history can be utilised. The global history value stores the n most recent branch direction outcomes in an unsigned integer, with the least-significant bit being the most recent branch direction. The global history is speculatively updated on ``predict``, and is corrected if needed on ``update`` and ``flush``.  To facilitate this speculative updating, and rolling-back on correction, for a global history of n the branch predictor keeps track of the 2n most recent branch outcomes.  Valid values for Global History are 1-32.
 
 Branch Target Buffer (BTB)
     For each entry, the BTB stores the most recent target along with an n-bit saturating counter for an associated direction. The indexing of this structure uses the lower bits of an instruction address XOR'ed with the current global branch history value.
@@ -41,7 +43,7 @@ Perceptron Predictor
 The ``PerceptronPredictor`` has the same overall structure as the ``GenericPredictor`` but replaces the saturating counter as a means for direction prediction with a perceptron.  The ``PerceptronPredictor`` contains the following logic.
 
 Global History
-    For indexing relevant prediction structures and for retrieving a direction from the perceptrons, a global history can be utilised. The global history value uses n-bits to store the n most recent branch direction outcomes, with the left-most bit being the oldest.
+    For indexing relevant prediction structures, a global history can be utilised. The global history value stores the n most recent branch direction outcomes in an unsigned integer, with the least-significant bit being the most recent branch direction. The global history is speculatively updated on ``predict``, and is corrected if needed on ``update`` and ``flush``.  To facilitate this speculative updating, and rolling-back on correction, for a global history of n the branch predictor keeps track of the 2n most recent branch outcomes.  Valid values for Global History are 1-32.
 
 Branch Target Buffer (BTB)
     For each entry, the BTB stores the most recent target along with a perceptron for an associated direction. The indexing of this structure uses the lower, non-zero bits of an instruction address XOR'ed with the current global branch history value.

docs/sphinx/user/running_simeng.rst

@@ -26,7 +26,8 @@ Exit Clause
     The reason why the simulation has halted. Most commonly this is due to the invoking of the ``exit()`` system call by the workload under simulation.
 
 Statistics
-    A selection of simulation statistics describing the emergent simulated PMU-style hardware events.
+    A selection of simulation statistics describing the emergent simulated PMU-style hardware events. With respect to branch statistics, the misprediction rate
+is calculated as branches mispredicted / branches retired.
 
 All non-workload outputs from SimEng are prefixed with a tag of the format ``[SimEng:Object]`` (e.g. ``[SimEng:ExceptionHandler]``). If the output came from the root of the framework, the ``Object`` field is omitted.
 

src/include/simeng/CoreInstance.hh

@@ -2,15 +2,15 @@
 
 #include <string>
 
-#include "simeng/AlwaysNotTakenPredictor.hh"
 #include "simeng/Core.hh"
 #include "simeng/Elf.hh"
-#include "simeng/GenericPredictor.hh"
-#include "simeng/PerceptronPredictor.hh"
 #include "simeng/SpecialFileDirGen.hh"
 #include "simeng/arch/Architecture.hh"
 #include "simeng/arch/aarch64/Architecture.hh"
 #include "simeng/arch/riscv/Architecture.hh"
+#include "simeng/branchpredictors/AlwaysNotTakenPredictor.hh"
+#include "simeng/branchpredictors/GenericPredictor.hh"
+#include "simeng/branchpredictors/PerceptronPredictor.hh"
 #include "simeng/config/SimInfo.hh"
 #include "simeng/kernel/Linux.hh"
 #include "simeng/memory/FixedLatencyMemoryInterface.hh"

src/include/simeng/Instruction.hh

@@ -3,9 +3,9 @@
 #include <vector>
 
 #include "capstone/capstone.h"
-#include "simeng/BranchPredictor.hh"
 #include "simeng/Register.hh"
 #include "simeng/RegisterValue.hh"
+#include "simeng/branchpredictors/BranchPredictor.hh"
 #include "simeng/memory/MemoryInterface.hh"
 #include "simeng/span.hh"
 
@@ -154,9 +154,9 @@ class Instruction {
   bool wasBranchMispredicted() const {
     assert(executed_ &&
            "Branch misprediction check requires instruction to have executed");
-    // Flag as mispredicted if taken state was wrongly predicted, or taken and
-    // predicted target is wrong
-    return (branchTaken_ != prediction_.taken ||
+    // Flag as mispredicted if taken state was wrongly predicted, or taken
+    // and predicted target is wrong
+    return ((branchTaken_ != prediction_.isTaken) ||
             (prediction_.target != branchAddress_));
   }
 
@@ -178,7 +178,7 @@ class Instruction {
    * executing it. */
   uint16_t getStallCycles() const { return stallCycles_; }
 
-  /** Retrieve the number of cycles this instruction will take to be prcoessed
+  /** Retrieve the number of cycles this instruction will take to be processed
    * by the LSQ. */
   uint16_t getLSQLatency() const { return lsqExecutionLatency_; }
 

src/include/simeng/arch/Architecture.hh

@@ -3,10 +3,10 @@
 #include <tuple>
 #include <vector>
 
-#include "simeng/BranchPredictor.hh"
 #include "simeng/Core.hh"
 #include "simeng/Instruction.hh"
 #include "simeng/arch/ProcessStateChange.hh"
+#include "simeng/branchpredictors/BranchPredictor.hh"
 #include "simeng/kernel/Linux.hh"
 #include "simeng/memory/MemoryInterface.hh"
 

src/include/simeng/arch/aarch64/Instruction.hh

@@ -3,10 +3,10 @@
 #include <array>
 #include <unordered_map>
 
-#include "simeng/BranchPredictor.hh"
 #include "simeng/Instruction.hh"
 #include "simeng/arch/aarch64/InstructionGroups.hh"
 #include "simeng/arch/aarch64/operandContainer.hh"
+#include "simeng/branchpredictors/BranchPredictor.hh"
 
 struct cs_arm64_op;
 

src/include/simeng/arch/riscv/Instruction.hh

@@ -5,9 +5,9 @@
 #include <functional>
 #include <unordered_map>
 
-#include "simeng/BranchPredictor.hh"
 #include "simeng/Instruction.hh"
 #include "simeng/arch/riscv/InstructionGroups.hh"
+#include "simeng/branchpredictors/BranchPredictor.hh"
 
 namespace simeng {
 namespace arch {

src/include/simeng/AlwaysNotTakenPredictor.hh → src/include/simeng/branchpredictors/AlwaysNotTakenPredictor.hh

@@ -1,22 +1,24 @@
 #pragma once
 
-#include "simeng/BranchPredictor.hh"
+#include "simeng/branchpredictors/BranchPredictor.hh"
 
 namespace simeng {
 
-/** An "Always Not Taken" branch predictor; predicts all branches as not taken.
- */
+/** An "Always Not Taken" branch predictor; predicts all branches as not
+ * taken. */
 class AlwaysNotTakenPredictor : public BranchPredictor {
  public:
   /** Generate a branch prediction for the specified instruction address; will
    * always predict not taken. */
   BranchPrediction predict(uint64_t address, BranchType type,
                            int64_t knownOffset) override;
 
-  /** Provide branch results to update the prediction model for the specified
-   * instruction address. As this model is static, this does nothing. */
-  void update(uint64_t address, bool taken, uint64_t targetAddress,
-              BranchType type) override;
+  /** Updates appropriate predictor model objects based on the address, type and
+   * outcome of the branch instruction.  Update must be called on
+   * branches in program order.  To check this, instructionId is also passed
+   * to this function. */
+  void update(uint64_t address, bool isTaken, uint64_t targetAddress,
+              BranchType type, uint64_t instructionId) override;
 
   /** Provide flush logic for branch prediction scheme. As there's no flush
    * logic for an always taken predictor, this does nothing. */

src/include/simeng/branchpredictors/BranchPredictor.hh

@@ -0,0 +1,83 @@
+#pragma once
+
+#include <cstdint>
+#include <tuple>
+
+namespace simeng {
+
+/** The types of branches recognised. */
+enum class BranchType {
+  Conditional = 0,
+  LoopClosing,
+  Return,
+  SubroutineCall,
+  Unconditional,
+  Unknown
+};
+
+/** A branch result prediction for an instruction. */
+struct BranchPrediction {
+  /** Whether the branch will be taken. */
+  bool isTaken;
+
+  /** The branch instruction's target address. If `isTaken == false`, the value
+   * will be ignored. */
+  uint64_t target;
+
+  /** Check for equality of two branch predictions . */
+  bool operator==(const BranchPrediction& other) {
+    if ((isTaken == other.isTaken) && (target == other.target))
+      return true;
+    else
+      return false;
+  }
+
+  /** Check for inequality of two branch predictions . */
+  bool operator!=(const BranchPrediction& other) {
+    if ((isTaken != other.isTaken) || (target != other.target))
+      return true;
+    else
+      return false;
+  }
+};
+
+/** An abstract branch predictor interface. */
+class BranchPredictor {
+ public:
+  virtual ~BranchPredictor(){};
+
+  /** Generate a branch prediction for the supplied instruction address, a
+   * branch type, and a known branch offset; defaults to 0 meaning offset is not
+   * known. Returns a branch direction and branch target address. */
+  virtual BranchPrediction predict(uint64_t address, BranchType type,
+                                   int64_t knownOffset) = 0;
+
+  /** Updates appropriate predictor model objects based on the address, type and
+   * outcome of the branch instruction.  Update must be called on
+   * branches in program order.  To check this, instructionId is also passed
+   * to this function. */
+  virtual void update(uint64_t address, bool isTaken, uint64_t targetAddress,
+                      BranchType type, uint64_t instructionId) = 0;
+
+  /** Provides flushing behaviour for the implemented branch prediction schemes
+   * via the instruction address.  Branches must be flushed in reverse
+   * program order (though, if a block of n instructions is being flushed at
+   * once, the exact order that the individual instructions within this block
+   * are flushed does not matter so long as they are all flushed). */
+  virtual void flush(uint64_t address) = 0;
+
+  /** lastUpdatedInstructionId_ is used only in debug mode. Clang throws a
+   * warning (which becomes an error with our cmake flags) for unused
+   * variables. If the [[maybe_unused]] attribute is added to avoid this,
+   * then gcc throws a warning (which becomes an error) because it ignores
+   * this attribute. Therefore, to avoid the above catch 22, this variable is
+   * hidden behind an ifdef such that it is declared only in debug mode; when
+   * it is used. */
+#ifndef NDEBUG
+  /** The Id of the last instruction that update was called on -- used to
+   * ensure that update is called in program order. */
+  uint64_t lastUpdatedInstructionId_ = 0;
+#endif
+};
+
+}  // namespace simeng