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Update project tt_um_jamesrosssharp_1bitam (jamesrosssharp/tt09-am-sdr) #41

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Oct 27, 2024
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Update project tt_um_jamesrosssharp_1bitam (jamesrosssharp/tt09-am-sdr) #41

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8 changes: 4 additions & 4 deletions projects/tt_um_jamesrosssharp_1bitam/commit_id.json
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Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"app": "Tiny Tapeout tt09 30dbb0cd",
"app": "Tiny Tapeout tt09 b176ed7c",
"repo": "https://github.com/jamesrosssharp/tt09-am-sdr",
"commit": "7650db3ffba93eaa69990b231e6e18236e432c42",
"workflow_url": "https://github.com/jamesrosssharp/tt09-am-sdr/actions/runs/11192111947",
"commit": "a2a5c0f7128774bb6a97d489772b01d4c283540d",
"workflow_url": "https://github.com/jamesrosssharp/tt09-am-sdr/actions/runs/11538461894",
"sort_id": 1727598365626,
"openlane_version": "OpenLane2 2.1.7",
"openlane_version": "OpenLane2 2.1.9",
"pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"
}
43 changes: 38 additions & 5 deletions projects/tt_um_jamesrosssharp_1bitam/docs/info.md
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Expand Up @@ -9,19 +9,52 @@ You can also include images in this folder and reference them in the markdown. E

## How it works

This is a Software Defined Radio pipeline for AM radio reception written in verilog. It works using
an external comparator as a 1-bit ADC frontend which is oversampled and decimated 4096 times to give
around 6 bits of precision. It is based on this [Hackaday Project](https://hackaday.io/project/170916-fpga-3-r-1-c-mw-and-sw-sdr-receiver).
This project is a Software Defined Radio pipeline for AM radio reception written in verilog. It works using an external comparator as a 1-bit ADC frontend which is oversampled and decimated 4096 times to give an extra 6 bits of precision. It is based on this Hackaday Project: [https://hackaday.io/project/170916-fpga-3-r-1-c-mw-and-sw-sdr-receiver](https://hackaday.io/project/170916-fpga-3-r-1-c-mw-and-sw-sdr-receiver) by Alberto Garlassi.

Although this is a fully digital core, but there are plans to make an analog frontend circuit as an analog design in future Tiny Tapeouts, so both designs would be hooked up together to create a radio with few external components.

Also, this core is very big - 3x2 Tiny Tapeout tiles (@ 64% utilisation). An area of future development could be to simplify the demodulation pipeline to reduce gate count.

## How to test

You need to connect an external comparator and RC network.
You need to connect an external comparator and RC network. You will probably need a simple RF amplifier as well. See below for more information.

The core has a SPI interface for setting the demodulation frequency and gain. It consists of a single
32-bit shift register. It has the following format:-

| Bits 31 - 30| Bits 29 - 26 | Bits 25 - 0 |
|-------------|--------------|-----------------|
| Unused | Gain | NCO Phase incr.|

The gain can take on the following values:

| "Gain" value| Actual Gain|
|--------------|------------|
| 0 | x1 |
| 1 | x2 |
| 2 | x4 |
| 3 | x8 |
| 4 | x16 |
| 5 - 7 | x32 |

![Alt text](schematic.png "the schematic for the external circuitry")
If the gain is set too high, the demodulated signal will wrap and sound distorted, so adjust the gain down to the minimum needed to hear the station clearly.

The "NCO Phase increment" is the value that is added to the NCO phase every clock cycle. Use the following python code to calculate the value to write, based on the desired carrier frequency:

hex(int((1<<26) * <carrier frequency> / <chip clock frequency>))

E.g., for 936kHz (ABC Radio national Hobart) at 50MHz clock frequency, it would be:

> hex(int((1<<26) * 936000 / 50000000))
'0x132b55'

## External hardware

![Schematic diagram of external circuitry](schematic.png "the schematic for the external circuitry")

- External comparator
- Resistor bias network
- RC network
- External SPI microcontroller to set station
- RF amplifier

40 changes: 20 additions & 20 deletions projects/tt_um_jamesrosssharp_1bitam/stats/metrics.csv
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Original file line number Diff line number Diff line change
Expand Up @@ -23,10 +23,10 @@ timing__setup__tns__corner:nom_tt_025C_1v80,0.0
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Expand All @@ -40,10 +40,10 @@ timing__setup__tns__corner:nom_ss_100C_1v60,0.0
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Expand All @@ -57,10 +57,10 @@ timing__setup__tns__corner:nom_ff_n40C_1v95,0.0
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Expand All @@ -74,10 +74,10 @@ timing__setup__tns,0.0
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Expand Down Expand Up @@ -147,10 +147,10 @@ timing__setup__tns__corner:min_tt_025C_1v80,0.0
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Expand All @@ -166,10 +166,10 @@ timing__setup__tns__corner:min_ss_100C_1v60,0.0
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Expand All @@ -185,10 +185,10 @@ timing__setup__tns__corner:min_ff_n40C_1v95,0.0
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Expand All @@ -204,10 +204,10 @@ timing__setup__tns__corner:max_tt_025C_1v80,0.0
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Expand All @@ -223,10 +223,10 @@ timing__setup__tns__corner:max_ss_100C_1v60,0.0
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Expand Down
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