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Update project tt_um_wokwi_414120263584922625 (abnowack/tinytapeout) #336

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201 changes: 201 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/LICENSE
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9 changes: 9 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/commit_id.json
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{
"app": "Tiny Tapeout tt09 a48b1c74",
"repo": "https://github.com/abnowack/tinytapeout",
"commit": "6d2a136c7a99bd47c42c0f49764f5dab8894948f",
"workflow_url": "https://github.com/abnowack/tinytapeout/actions/runs/11760870581",
"sort_id": 1731202005055,
"openlane_version": "OpenLane2 2.1.9",
"pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"
}
21 changes: 21 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/docs/info.md
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<!---
This file is used to generate your project datasheet. Please fill in the information below and delete any unused
sections.
You can also include images in this folder and reference them in the markdown. Each image must be less than
512 kb in size, and the combined size of all images must be less than 1 MB.
-->

## How it works

A simple 5 bit LFSR I took from nandland,
https://nandland.com/lfsr-linear-feedback-shift-register/

## How to test

The 5 first LEDs should output a pseudo random 5 bit number

## External hardware

5 LEDs connected to the first five output pins
48 changes: 48 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/info.yaml
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# Tiny Tapeout project information (Wokwi project)
project:
wokwi_id: 414120263584922625 # Set this to the ID of your Wokwi project (the number from the project's URL)
title: "5 bit LFSR" # Project title
author: "Aaron Nowack" # Your name
discord: "" # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
description: "5 Bit LFSR" # One line description of what your project does
language: "Wokwi" # other examples include SystemVerilog, Amaranth, VHDL, etc
clock_hz: 0 # Clock frequency in Hz (or 0 if not applicable)

# How many tiles your design occupies? A single tile is about 167x108 uM.
tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2


# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
# Inputs
ui[0]: ""
ui[1]: ""
ui[2]: ""
ui[3]: ""
ui[4]: ""
ui[5]: ""
ui[6]: ""
ui[7]: ""

# Outputs
uo[0]: "OUT0"
uo[1]: "OUT1"
uo[2]: "OUT2"
uo[3]: "OUT3"
uo[4]: "OUT4"
uo[5]: ""
uo[6]: ""
uo[7]: ""

# Bidirectional pins
uio[0]: ""
uio[1]: ""
uio[2]: ""
uio[3]: ""
uio[4]: ""
uio[5]: ""
uio[6]: ""
uio[7]: ""

# Do not change!
yaml_version: 6
263 changes: 263 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/stats/metrics.csv
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timing__unannotated_net__count__corner:max_tt_025C_1v80,57
timing__unannotated_net_filtered__count__corner:max_tt_025C_1v80,0
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timing__setup__ws__corner:max_ss_100C_1v60,14.175754304973166
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design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.0000446665
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design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,6.66397E-7
design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000246844
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90 changes: 90 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/stats/synthesis-stats.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,90 @@
62. Printing statistics.

=== dff_cell ===

Number of wires: 4
Number of wire bits: 4
Number of public wires: 4
Number of public wire bits: 4
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 2
sky130_fd_sc_hd__dfxtp_2 1
sky130_fd_sc_hd__inv_2 1

Chip area for module '\dff_cell': 25.024000

=== not_cell ===

Number of wires: 2
Number of wire bits: 2
Number of public wires: 2
Number of public wire bits: 2
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1
sky130_fd_sc_hd__inv_2 1

Chip area for module '\not_cell': 3.753600

=== tt_um_wokwi_414120263584922625 ===

Number of wires: 15
Number of wire bits: 50
Number of public wires: 15
Number of public wire bits: 50
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 31
dff_cell 5
not_cell 1
sky130_fd_sc_hd__buf_2 5
sky130_fd_sc_hd__conb_1 19
xor_cell 1

Area for cell type \dff_cell is unknown!
Area for cell type \not_cell is unknown!
Area for cell type \xor_cell is unknown!

Chip area for module '\tt_um_wokwi_414120263584922625': 96.342400

=== xor_cell ===

Number of wires: 3
Number of wire bits: 3
Number of public wires: 3
Number of public wire bits: 3
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1
sky130_fd_sc_hd__xor2_2 1

Chip area for module '\xor_cell': 16.265600

=== design hierarchy ===

tt_um_wokwi_414120263584922625 1
dff_cell 5
not_cell 1
xor_cell 1

Number of wires: 40
Number of wire bits: 75
Number of public wires: 40
Number of public wire bits: 75
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 36
sky130_fd_sc_hd__buf_2 5
sky130_fd_sc_hd__conb_1 19
sky130_fd_sc_hd__dfxtp_2 5
sky130_fd_sc_hd__inv_2 6
sky130_fd_sc_hd__xor2_2 1

Chip area for top module '\tt_um_wokwi_414120263584922625': 241.481600

Binary file not shown.

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6,595 changes: 6,595 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/tt_um_wokwi_414120263584922625.v

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242 changes: 242 additions & 0 deletions projects/tt_um_wokwi_414120263584922625/wokwi-diagram.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,242 @@
{
"version": 1,
"author": "Uri Shaked",
"editor": "wokwi",
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"id": "sw1",
"top": -176.5,
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},
{
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},
{ "type": "wokwi-gnd", "id": "pwr2", "top": 144, "left": 997.8, "attrs": {} },
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{
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},
{ "type": "wokwi-vcc", "id": "pwr3", "top": -373.64, "left": 105.6, "attrs": {} },
{
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{
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},
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{
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{ "type": "wokwi-vcc", "id": "pwr5", "top": -325.64, "left": -230.4, "attrs": {} },
{
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{
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{
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"attrs": { "color": "red", "flip": "1" }
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{
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"top": -368.4,
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"attrs": { "color": "red", "flip": "1" }
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{
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"top": 38.6,
"left": 278.2,
"rotate": 270,
"attrs": {}
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{
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"attrs": {}
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{
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"attrs": {}
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{
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"attrs": {}
},
{
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"left": 192,
"rotate": 270,
"attrs": {}
},
{
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"left": 220.8,
"rotate": 180,
"attrs": {}
},
{
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"id": "xor1",
"top": -105.2,
"left": 336,
"rotate": 180,
"attrs": {}
}
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[ "pwr1:VCC", "sw1:7a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:6a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:5a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:4a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:1a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:2a", "red", [ "v0" ] ],
[ "pwr1:VCC", "sw1:3a", "red", [ "v0" ] ],
[ "sw2:1", "clock1:CLK", "blue", [ "h-19.2", "v-57.6" ] ],
[ "sw1:1b", "ttin:EXTIN0", "green", [ "h0" ] ],
[ "sw1:2b", "ttin:EXTIN1", "green", [ "h0" ] ],
[ "ttin:EXTIN2", "sw1:3b", "green", [ "h0" ] ],
[ "ttin:EXTIN3", "sw1:4b", "green", [ "h0" ] ],
[ "sw1:5b", "ttin:EXTIN4", "green", [ "h0" ] ],
[ "ttin:EXTIN5", "sw1:6b", "green", [ "h0" ] ],
[ "sw1:7b", "ttin:EXTIN6", "green", [ "h0" ] ],
[ "sw1:8b", "ttin:EXTIN7", "green", [ "v0" ] ],
[ "sw2:2", "ttin:EXTCLK", "blue", [ "v0" ] ],
[ "btn1:1.l", "sw2:3", "blue", [ "h0" ] ],
[ "pwr3:VCC", "btn1:2.r", "red", [ "v0" ] ],
[ "btn2:2.l", "gnd1:GND", "black", [ "h0" ] ],
[ "ttin:EXTRST_N", "btn2:1.r", "orange", [ "h-38.4", "v-96" ] ],
[ "btn2:1.l", "r2:2", "green", [ "h0" ] ],
[ "pwr5:VCC", "r2:1", "red", [ "v0" ] ],
[ "ttout:EXTOUT0", "led2:A", "green", [ "v-211.2", "h19.2" ] ],
[ "led2:C", "pwr2:GND", "green", [ "v0", "h96" ] ],
[ "ttout:EXTOUT7", "led1:A", "green", [ "h19.2", "v278.4" ] ],
[ "led1:C", "pwr2:GND", "green", [ "v0" ] ],
[ "led3:A", "ttout:EXTOUT6", "green", [ "v0", "h-67.2", "v-211.2" ] ],
[ "led3:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "ttout:EXTOUT5", "led4:A", "green", [ "h38.4", "v144" ] ],
[ "led4:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "ttout:EXTOUT4", "led5:A", "green", [ "h48", "v67.2" ] ],
[ "led5:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "led6:A", "ttout:EXTOUT3", "green", [ "v0" ] ],
[ "led7:A", "ttout:EXTOUT2", "green", [ "v0", "h-19.2", "v67.2" ] ],
[ "led8:A", "ttout:EXTOUT1", "green", [ "v0", "h-38.4", "v134.4" ] ],
[ "led8:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "led7:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "led6:C", "pwr2:GND", "green", [ "v0", "h86" ] ],
[ "xor1:OUT", "not1:IN", "green", [ "v0" ] ],
[ "ttin:CLK", "flop5:CLK", "green", [ "v0", "h48", "v336", "h96" ] ],
[ "flop1:CLK", "flop5:CLK", "green", [ "v28.8", "h-67.2", "v-28.8" ] ],
[ "flop2:CLK", "flop1:CLK", "green", [ "v28.8", "h-67.2", "v-28.8" ] ],
[ "flop3:CLK", "flop2:CLK", "green", [ "v28.8", "h-67.2", "v-28.8" ] ],
[ "flop4:CLK", "flop3:CLK", "green", [ "v28.8", "h-57.6", "v-28.8" ] ],
[ "flop5:Q", "flop1:D", "green", [ "v-28.6", "h67", "v124.8" ] ],
[ "flop1:Q", "flop2:D", "green", [ "v-28.8", "h67.2", "v124.8" ] ],
[ "flop3:Q", "flop4:D", "green", [ "v-28.8", "h57.6", "v124.8" ] ],
[ "not1:OUT", "flop5:D", "green", [ "v0", "h-19.2", "v192" ] ],
[ "xor1:B", "flop4:Q", "green", [ "h0" ] ],
[ "flop4:Q", "ttout:OUT4", "green", [ "v0" ] ],
[ "flop3:Q", "ttout:OUT3", "green", [ "v0" ] ],
[ "flop2:Q", "flop3:D", "green", [ "v-28.8", "h67.2", "v124.8" ] ],
[ "xor1:A", "flop2:Q", "green", [ "h19.2", "v28.8", "h-48" ] ],
[ "flop2:Q", "ttout:OUT2", "green", [ "v-19.2", "h57.6", "v-172.8" ] ],
[ "flop1:Q", "ttout:OUT1", "green", [ "v0" ] ],
[ "flop5:Q", "ttout:OUT0", "green", [ "v0" ] ]
],
"dependencies": {}
}