Update project tt_um_rebeccargb_vga_pride (RebeccaRGB/tt-vga-pride)

projects/tt_um_rebeccargb_vga_pride/commit_id.json

@@ -1,8 +1,8 @@
 {
-  "app": "Tiny Tapeout tt09 b176ed7c",
+  "app": "Tiny Tapeout tt09 a48b1c74",
   "repo": "https://github.com/RebeccaRGB/tt-vga-pride",
-  "commit": "b2b4794ad1e0b9a8dc24424562dff0ae379e05e3",
-  "workflow_url": "https://github.com/RebeccaRGB/tt-vga-pride/actions/runs/11544462167",
+  "commit": "b9dae12f79321c990884aac542c9197e5653cde8",
+  "workflow_url": "https://github.com/RebeccaRGB/tt-vga-pride/actions/runs/11711476113",
   "sort_id": 1726789713634,
   "openlane_version": "OpenLane2 2.1.9",
   "pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"

projects/tt_um_rebeccargb_vga_pride/stats/metrics.csv

@@ -12,8 +12,8 @@ design__max_fanout_violation__count__corner:nom_tt_025C_1v80,5
 design__max_cap_violation__count__corner:nom_tt_025C_1v80,0
 power__internal__total,0.0005552194779738784
 power__switching__total,0.0007161822286434472
-power__leakage__total,2.1992050847075006E-8
-power__total,0.0012714237673208117
+power__leakage__total,2.9706876958357498E-8
+power__total,0.0012714314507320523
 clock__skew__worst_hold__corner:nom_tt_025C_1v80,-0.03673939034765414
 clock__skew__worst_setup__corner:nom_tt_025C_1v80,-0.03673939034765414
 timing__hold__ws__corner:nom_tt_025C_1v80,0.3870989194310018
@@ -92,8 +92,8 @@ design__instance__count__macros,0
 design__instance__area__macros,0
 design__instance__utilization,0.604427
 design__instance__utilization__stdcell,0.604427
-design__power_grid_violation__count__net:VGND,0
 design__power_grid_violation__count__net:VPWR,0
+design__power_grid_violation__count__net:VGND,0
 design__power_grid_violation__count,0
 timing__drv__floating__nets,0
 timing__drv__floating__pins,0
@@ -257,15 +257,15 @@ timing__unannotated_net__count__corner:max_ff_n40C_1v95,22
 timing__unannotated_net_filtered__count__corner:max_ff_n40C_1v95,0
 timing__unannotated_net__count,22
 timing__unannotated_net_filtered__count,0
-design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79989
+design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79991
 design_powergrid__drop__average__net:VPWR__corner:nom_tt_025C_1v80,1.79999
-design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.000107953
-design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000778068
-design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.0000104691
-design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000778068
+design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.0000925554
+design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000678206
+design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.000010289
+design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000678206
 ir__voltage__worst,1.8000000000000000444089209850062616169452667236328125
-ir__drop__avg,0.0000113999999999999992723702380015282642489182762801647186279296875
-ir__drop__worst,0.00010799999999999999595982902445001627711462788283824920654296875
+ir__drop__avg,0.000010799999999999999934796081346721763338791788555681705474853515625
+ir__drop__worst,0.00009260000000000000110363107541644467346486635506153106689453125
 magic__drc_error__count,0
 magic__illegal_overlap__count,0
 design__lvs_device_difference__count,0