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Update project tt_um_pongsagon_tiniest_gpu (pongsagon/tt07-tiniest-gpu) #117

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merged 1 commit into from
May 29, 2024
Merged

Update project tt_um_pongsagon_tiniest_gpu (pongsagon/tt07-tiniest-gpu) #117

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6 changes: 3 additions & 3 deletions projects/tt_um_pongsagon_tiniest_gpu/commit_id.json
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Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt07 98e94823",
"app": "Tiny Tapeout tt07 f56fdf7c",
"repo": "https://github.com/pongsagon/tt07-tiniest-gpu",
"commit": "182e6ed0a845eae9b6e1d452d6aa059e0b0d4950",
"workflow_url": "https://github.com/pongsagon/tt07-tiniest-gpu/actions/runs/9257115494",
"commit": "12ae2bb593f9bf1f76ce4fde2e9530393e0ce42a",
"workflow_url": "https://github.com/pongsagon/tt07-tiniest-gpu/actions/runs/9280686674",
"sort_id": 1716400956338,
"openlane_version": "OpenLane 337ffbf4749b8bc6e8d8742ed9a595934142198b",
"pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"
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3 changes: 2 additions & 1 deletion projects/tt_um_pongsagon_tiniest_gpu/info.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,8 @@ project:
- "raster.v"
- "dot4.v"
- "ia.v"
- "bitmap_rom.v"
- "bitmap_rom_ddct.v"
- "bitmap_rom_sk.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
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2 changes: 1 addition & 1 deletion projects/tt_um_pongsagon_tiniest_gpu/stats/metrics.csv
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
/work/src,tt_um_pongsagon_tiniest_gpu,wokwi,flow completed,0h28m35s0ms,0h22m20s0ms,121510.57972426964,0.31113340159999997,60755.28986213482,59.11,61.830600000000004,1269.8,17094,0,0,0,0,0,0,0,44,27,0,-1,-1,743448,148472,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,530954820.0,0.0,71.47,51.09,53.11,10.34,-1,14385,19996,346,5106,0,0,0,17011,538,62,426,1321,2780,1628,421,1909,2490,2495,22,10865,4399,293,7018,18903,41478,302420.04480000003,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.7,0,sky130_fd_sc_hd,AREA 0
/work/src,tt_um_pongsagon_tiniest_gpu,wokwi,flow completed,0h52m10s0ms,0h45m54s0ms,123837.55585822645,0.31113340159999997,61918.777929113225,60.06,63.5703,1336.35,17395,0,0,0,0,0,0,0,118,88,0,-1,-1,896960,163834,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,624754425.0,0.0,78.81,65.59,70.51,25.57,-1,15067,20690,351,5123,0,0,0,17692,561,62,426,1330,2857,1630,420,2412,2494,2499,24,10705,4399,574,7573,19265,42516,302420.04480000003,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.7,0,sky130_fd_sc_hd,AREA 0
157 changes: 77 additions & 80 deletions projects/tt_um_pongsagon_tiniest_gpu/stats/synthesis-stats.txt
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Original file line number Diff line number Diff line change
@@ -1,94 +1,91 @@

74. Printing statistics.
75. Printing statistics.

=== tt_um_pongsagon_tiniest_gpu ===

Number of wires: 17078
Number of wire bits: 17113
Number of public wires: 2498
Number of public wire bits: 2533
Number of wires: 17379
Number of wire bits: 17414
Number of public wires: 2502
Number of public wire bits: 2537
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 17094
sky130_fd_sc_hd__a2111o_2 25
sky130_fd_sc_hd__a2111oi_2 2
sky130_fd_sc_hd__a211o_2 309
sky130_fd_sc_hd__a211oi_2 16
sky130_fd_sc_hd__a21bo_2 104
sky130_fd_sc_hd__a21boi_2 24
sky130_fd_sc_hd__a21o_2 466
sky130_fd_sc_hd__a21oi_2 399
sky130_fd_sc_hd__a221o_2 358
sky130_fd_sc_hd__a221oi_2 3
sky130_fd_sc_hd__a22o_2 503
sky130_fd_sc_hd__a22oi_2 4
sky130_fd_sc_hd__a2bb2o_2 51
Number of cells: 17395
sky130_fd_sc_hd__a2111o_2 26
sky130_fd_sc_hd__a2111oi_2 1
sky130_fd_sc_hd__a211o_2 317
sky130_fd_sc_hd__a211oi_2 21
sky130_fd_sc_hd__a21bo_2 97
sky130_fd_sc_hd__a21boi_2 40
sky130_fd_sc_hd__a21o_2 405
sky130_fd_sc_hd__a21oi_2 394
sky130_fd_sc_hd__a221o_2 356
sky130_fd_sc_hd__a221oi_2 2
sky130_fd_sc_hd__a22o_2 501
sky130_fd_sc_hd__a22oi_2 5
sky130_fd_sc_hd__a2bb2o_2 54
sky130_fd_sc_hd__a2bb2oi_2 1
sky130_fd_sc_hd__a311o_2 88
sky130_fd_sc_hd__a311oi_2 10
sky130_fd_sc_hd__a31o_2 214
sky130_fd_sc_hd__a31oi_2 23
sky130_fd_sc_hd__a32o_2 115
sky130_fd_sc_hd__a32oi_2 1
sky130_fd_sc_hd__a311o_2 98
sky130_fd_sc_hd__a311oi_2 6
sky130_fd_sc_hd__a31o_2 264
sky130_fd_sc_hd__a31oi_2 26
sky130_fd_sc_hd__a32o_2 112
sky130_fd_sc_hd__a32oi_2 4
sky130_fd_sc_hd__a41o_2 8
sky130_fd_sc_hd__a41oi_2 5
sky130_fd_sc_hd__and2_2 668
sky130_fd_sc_hd__and2b_2 258
sky130_fd_sc_hd__and3_2 249
sky130_fd_sc_hd__and3b_2 51
sky130_fd_sc_hd__and4_2 43
sky130_fd_sc_hd__and4b_2 5
sky130_fd_sc_hd__and4bb_2 4
sky130_fd_sc_hd__buf_1 1666
sky130_fd_sc_hd__buf_2 3
sky130_fd_sc_hd__a41oi_2 2
sky130_fd_sc_hd__and2_2 663
sky130_fd_sc_hd__and2b_2 256
sky130_fd_sc_hd__and3_2 230
sky130_fd_sc_hd__and3b_2 47
sky130_fd_sc_hd__and4_2 23
sky130_fd_sc_hd__and4b_2 10
sky130_fd_sc_hd__and4bb_2 9
sky130_fd_sc_hd__buf_1 1720
sky130_fd_sc_hd__buf_2 2
sky130_fd_sc_hd__conb_1 16
sky130_fd_sc_hd__dfxtp_2 2490
sky130_fd_sc_hd__inv_2 272
sky130_fd_sc_hd__mux2_2 614
sky130_fd_sc_hd__nand2_2 894
sky130_fd_sc_hd__nand2b_2 14
sky130_fd_sc_hd__nand3_2 92
sky130_fd_sc_hd__nand3b_2 8
sky130_fd_sc_hd__nand4_2 5
sky130_fd_sc_hd__nand4b_2 1
sky130_fd_sc_hd__nor2_2 843
sky130_fd_sc_hd__nor2b_2 20
sky130_fd_sc_hd__nor3_2 29
sky130_fd_sc_hd__nor3b_2 2
sky130_fd_sc_hd__nor4_2 6
sky130_fd_sc_hd__nor4b_2 1
sky130_fd_sc_hd__o2111a_2 17
sky130_fd_sc_hd__o2111ai_2 4
sky130_fd_sc_hd__o211a_2 1668
sky130_fd_sc_hd__o211ai_2 20
sky130_fd_sc_hd__o21a_2 224
sky130_fd_sc_hd__o21ai_2 246
sky130_fd_sc_hd__o21ba_2 40
sky130_fd_sc_hd__o21bai_2 37
sky130_fd_sc_hd__o221a_2 202
sky130_fd_sc_hd__o221ai_2 4
sky130_fd_sc_hd__o22a_2 78
sky130_fd_sc_hd__o22ai_2 5
sky130_fd_sc_hd__o2bb2a_2 41
sky130_fd_sc_hd__o2bb2ai_2 2
sky130_fd_sc_hd__o311a_2 50
sky130_fd_sc_hd__o311ai_2 2
sky130_fd_sc_hd__o31a_2 65
sky130_fd_sc_hd__o31ai_2 16
sky130_fd_sc_hd__o32a_2 16
sky130_fd_sc_hd__o32ai_2 1
sky130_fd_sc_hd__o41a_2 7
sky130_fd_sc_hd__o41ai_2 4
sky130_fd_sc_hd__or2_2 1951
sky130_fd_sc_hd__or2b_2 236
sky130_fd_sc_hd__dfxtp_2 2494
sky130_fd_sc_hd__inv_2 237
sky130_fd_sc_hd__mux2_2 631
sky130_fd_sc_hd__nand2_2 1000
sky130_fd_sc_hd__nand2b_2 18
sky130_fd_sc_hd__nand3_2 74
sky130_fd_sc_hd__nand3b_2 2
sky130_fd_sc_hd__nand4_2 12
sky130_fd_sc_hd__nand4b_2 3
sky130_fd_sc_hd__nor2_2 839
sky130_fd_sc_hd__nor2b_2 18
sky130_fd_sc_hd__nor3_2 24
sky130_fd_sc_hd__nor3b_2 5
sky130_fd_sc_hd__nor4_2 3
sky130_fd_sc_hd__o2111a_2 23
sky130_fd_sc_hd__o2111ai_2 5
sky130_fd_sc_hd__o211a_2 1675
sky130_fd_sc_hd__o211ai_2 22
sky130_fd_sc_hd__o21a_2 296
sky130_fd_sc_hd__o21ai_2 267
sky130_fd_sc_hd__o21ba_2 42
sky130_fd_sc_hd__o21bai_2 23
sky130_fd_sc_hd__o221a_2 205
sky130_fd_sc_hd__o221ai_2 10
sky130_fd_sc_hd__o22a_2 80
sky130_fd_sc_hd__o22ai_2 14
sky130_fd_sc_hd__o2bb2a_2 48
sky130_fd_sc_hd__o311a_2 52
sky130_fd_sc_hd__o311ai_2 4
sky130_fd_sc_hd__o31a_2 75
sky130_fd_sc_hd__o31ai_2 21
sky130_fd_sc_hd__o32a_2 36
sky130_fd_sc_hd__o41a_2 5
sky130_fd_sc_hd__o41ai_2 1
sky130_fd_sc_hd__or2_2 1919
sky130_fd_sc_hd__or2b_2 292
sky130_fd_sc_hd__or3_2 175
sky130_fd_sc_hd__or3b_2 50
sky130_fd_sc_hd__or4_2 127
sky130_fd_sc_hd__or4b_2 18
sky130_fd_sc_hd__or4bb_2 3
sky130_fd_sc_hd__xnor2_2 536
sky130_fd_sc_hd__xor2_2 266
sky130_fd_sc_hd__or4_2 141
sky130_fd_sc_hd__or4b_2 19
sky130_fd_sc_hd__or4bb_2 5
sky130_fd_sc_hd__xnor2_2 561
sky130_fd_sc_hd__xor2_2 253

Chip area for module '\tt_um_pongsagon_tiniest_gpu': 175152.985600
Chip area for module '\tt_um_pongsagon_tiniest_gpu': 177955.673600

Binary file modified projects/tt_um_pongsagon_tiniest_gpu/tt_um_pongsagon_tiniest_gpu.gds
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105 changes: 52 additions & 53 deletions projects/tt_um_pongsagon_tiniest_gpu/tt_um_pongsagon_tiniest_gpu.lef
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Expand Up @@ -91,7 +91,6 @@ MACRO tt_um_pongsagon_tiniest_gpu
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.852000 ;
ANTENNADIFFAREA 0.434700 ;
PORT
LAYER met4 ;
RECT 154.870 224.760 155.170 225.760 ;
Expand Down Expand Up @@ -141,7 +140,7 @@ MACRO tt_um_pongsagon_tiniest_gpu
PIN ui_in[3]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.742500 ;
ANTENNAGATEAREA 0.426000 ;
PORT
LAYER met4 ;
RECT 136.470 224.760 136.770 225.760 ;
Expand Down Expand Up @@ -337,7 +336,7 @@ MACRO tt_um_pongsagon_tiniest_gpu
PIN uio_out[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNADIFFAREA 0.795200 ;
ANTENNADIFFAREA 0.891000 ;
PORT
LAYER met4 ;
RECT 48.150 224.760 48.450 225.760 ;
Expand Down Expand Up @@ -489,56 +488,56 @@ MACRO tt_um_pongsagon_tiniest_gpu
LAYER li1 ;
RECT 2.760 2.635 1375.400 223.125 ;
LAYER met1 ;
RECT 2.760 0.040 1375.400 223.680 ;
RECT 2.760 0.040 1375.400 225.720 ;
LAYER met2 ;
RECT 4.230 0.010 1373.460 224.245 ;
RECT 4.230 0.010 1371.160 225.750 ;
LAYER met3 ;
RECT 3.950 0.175 1371.195 224.225 ;
LAYER met4 ;
RECT 4.690 224.360 7.270 224.760 ;
RECT 8.370 224.360 10.950 224.760 ;
RECT 12.050 224.360 14.630 224.760 ;
RECT 15.730 224.360 18.310 224.760 ;
RECT 19.410 224.360 21.990 224.760 ;
RECT 23.090 224.360 25.670 224.760 ;
RECT 26.770 224.360 29.350 224.760 ;
RECT 30.450 224.360 33.030 224.760 ;
RECT 34.130 224.360 36.710 224.760 ;
RECT 37.810 224.360 40.390 224.760 ;
RECT 41.490 224.360 44.070 224.760 ;
RECT 45.170 224.360 47.750 224.760 ;
RECT 48.850 224.360 51.430 224.760 ;
RECT 52.530 224.360 55.110 224.760 ;
RECT 56.210 224.360 58.790 224.760 ;
RECT 59.890 224.360 62.470 224.760 ;
RECT 63.570 224.360 66.150 224.760 ;
RECT 67.250 224.360 69.830 224.760 ;
RECT 70.930 224.360 73.510 224.760 ;
RECT 74.610 224.360 77.190 224.760 ;
RECT 78.290 224.360 80.870 224.760 ;
RECT 81.970 224.360 84.550 224.760 ;
RECT 85.650 224.360 88.230 224.760 ;
RECT 89.330 224.360 91.910 224.760 ;
RECT 93.010 224.360 95.590 224.760 ;
RECT 96.690 224.360 99.270 224.760 ;
RECT 100.370 224.360 102.950 224.760 ;
RECT 104.050 224.360 106.630 224.760 ;
RECT 107.730 224.360 110.310 224.760 ;
RECT 111.410 224.360 113.990 224.760 ;
RECT 115.090 224.360 117.670 224.760 ;
RECT 118.770 224.360 121.350 224.760 ;
RECT 122.450 224.360 125.030 224.760 ;
RECT 126.130 224.360 128.710 224.760 ;
RECT 129.810 224.360 132.390 224.760 ;
RECT 133.490 224.360 136.070 224.760 ;
RECT 137.170 224.360 139.750 224.760 ;
RECT 140.850 224.360 143.430 224.760 ;
RECT 144.530 224.360 147.110 224.760 ;
RECT 148.210 224.360 150.790 224.760 ;
RECT 151.890 224.360 154.470 224.760 ;
RECT 155.570 224.360 158.150 224.760 ;
RECT 159.250 224.360 1339.225 224.760 ;
RECT 3.975 223.680 1339.225 224.360 ;
RECT 3.950 0.175 1359.695 224.905 ;
LAYER met4 ;
RECT 4.690 224.360 7.270 224.905 ;
RECT 8.370 224.360 10.950 224.905 ;
RECT 12.050 224.360 14.630 224.905 ;
RECT 15.730 224.360 18.310 224.905 ;
RECT 19.410 224.360 21.990 224.905 ;
RECT 23.090 224.360 25.670 224.905 ;
RECT 26.770 224.360 29.350 224.905 ;
RECT 30.450 224.360 33.030 224.905 ;
RECT 34.130 224.360 36.710 224.905 ;
RECT 37.810 224.360 40.390 224.905 ;
RECT 41.490 224.360 44.070 224.905 ;
RECT 45.170 224.360 47.750 224.905 ;
RECT 48.850 224.360 51.430 224.905 ;
RECT 52.530 224.360 55.110 224.905 ;
RECT 56.210 224.360 58.790 224.905 ;
RECT 59.890 224.360 62.470 224.905 ;
RECT 63.570 224.360 66.150 224.905 ;
RECT 67.250 224.360 69.830 224.905 ;
RECT 70.930 224.360 73.510 224.905 ;
RECT 74.610 224.360 77.190 224.905 ;
RECT 78.290 224.360 80.870 224.905 ;
RECT 81.970 224.360 84.550 224.905 ;
RECT 85.650 224.360 88.230 224.905 ;
RECT 89.330 224.360 91.910 224.905 ;
RECT 93.010 224.360 95.590 224.905 ;
RECT 96.690 224.360 99.270 224.905 ;
RECT 100.370 224.360 102.950 224.905 ;
RECT 104.050 224.360 106.630 224.905 ;
RECT 107.730 224.360 110.310 224.905 ;
RECT 111.410 224.360 113.990 224.905 ;
RECT 115.090 224.360 117.670 224.905 ;
RECT 118.770 224.360 121.350 224.905 ;
RECT 122.450 224.360 125.030 224.905 ;
RECT 126.130 224.360 128.710 224.905 ;
RECT 129.810 224.360 132.390 224.905 ;
RECT 133.490 224.360 136.070 224.905 ;
RECT 137.170 224.360 139.750 224.905 ;
RECT 140.850 224.360 143.430 224.905 ;
RECT 144.530 224.360 147.110 224.905 ;
RECT 148.210 224.360 150.790 224.905 ;
RECT 151.890 224.360 154.470 224.905 ;
RECT 155.570 224.360 158.150 224.905 ;
RECT 159.250 224.360 1328.185 224.905 ;
RECT 3.975 223.680 1328.185 224.360 ;
RECT 3.975 2.080 17.880 223.680 ;
RECT 20.280 2.080 94.680 223.680 ;
RECT 97.080 2.080 171.480 223.680 ;
Expand All @@ -557,8 +556,8 @@ MACRO tt_um_pongsagon_tiniest_gpu
RECT 1095.480 2.080 1169.880 223.680 ;
RECT 1172.280 2.080 1246.680 223.680 ;
RECT 1249.080 2.080 1323.480 223.680 ;
RECT 1325.880 2.080 1339.225 223.680 ;
RECT 3.975 0.175 1339.225 2.080 ;
RECT 1325.880 2.080 1328.185 223.680 ;
RECT 3.975 0.175 1328.185 2.080 ;
END
END tt_um_pongsagon_tiniest_gpu
END LIBRARY
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