feat: update project tt_um_kianv_bare_metal from splinedrive/RISCV-Ki…

…anV-BareMetalStyle

Commit: 5ec86e00e8afa57a3978bc2d9aca0478ea414054
Workflow: https://github.com/splinedrive/RISCV-KianV-BareMetalStyle/actions/runs/8902437308

projects/tt_um_kianv_bare_metal/commit_id.json

@@ -1,8 +1,8 @@
 {
-  "app": "Tiny Tapeout tt07 4b2bb6d0",
+  "app": "Tiny Tapeout tt07 81bffaf9",
   "repo": "https://github.com/splinedrive/RISCV-KianV-BareMetalStyle",
-  "commit": "477b9c295c8387652859065384467984a21efce8",
-  "workflow_url": "https://github.com/splinedrive/RISCV-KianV-BareMetalStyle/actions/runs/8820871140",
+  "commit": "5ec86e00e8afa57a3978bc2d9aca0478ea414054",
+  "workflow_url": "https://github.com/splinedrive/RISCV-KianV-BareMetalStyle/actions/runs/8902437308",
   "sort_id": 1713981849557,
   "openlane_version": "OpenLane eaba5192c45aa333ab45216ce1773d75d539e9b3",
   "pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"

projects/tt_um_kianv_bare_metal/docs/info.md

@@ -8,13 +8,41 @@ You can also include images in this folder and reference them in the markdown. E
 -->
 
 ## How it works
-Explain how your project works
-it works it works
+After implementing a KianV uLinux TT06, I felt like implementing a KianV bare
+metal edition, which is an RV32E RISC-V32 SoC. This SoC is equipped with a
+UART, qspi memory controller (psram/flash), a generic SPI interface, and a sigma-delta emulator for playing audio
+files. In the firmware folder, the kernelboot.c and crt0.S files display all
+hardware registers and their initialization in the code.
 
 ## How to test
-Explain how to use your project
-Explain how to use your project
+First, one must build the toolchain for an RV32E, as you can see here:
+```
+sudo apt-get update
+sudo apt-get install autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev
+git clone --recursive https://github.com/riscv/riscv-gnu-toolchain.git
+cd riscv-gnu-toolchain
+./configure --prefix=/opt/riscv32e --with-arch=rv32e --with-abi=ilp32e
+make
+export PATH=/opt/riscv32e/bin:$PATH
+```
+The following hardware addresses are given:
+```
+#define LSR_DR 0x01
+#define LSR_TEMT 0x40
+#define LSR_THRE 0x20
+#define PWM_ADDR (IO_BASE + 0x14)
+#define REG_DIV (IO_BASE + 0x10)
+#define SPI_DIV (IO_BASE + 0x500010)
+#define UART_LSR (IO_BASE + 0x5)
+#define UART_RX (IO_BASE)
+#define UART_TX (IO_BASE)
+```
+The use of the registers can be determined from the C, linker script and assembly program.
+The CPU starts to execute the instruction stored in the NOR Flash at an offset of 1MiB.
+When the chip comes into my hands, I will provide demos that I test on the
+chip, including audio playback with appropriate documentation.
+
 
 ## External hardware
-List external hardware used in your project (e.g. PMOD, LED display, etc), if any
-List external hardware used in your project (e.g. PMOD, LED display, etc), if any
+It's very important to use the PMOD Flash + PSRAM. We only use 8MB of PSRAM
+address space.

projects/tt_um_kianv_bare_metal/info.yaml

@@ -5,7 +5,7 @@ project:
   discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
   description:  "A baremetal RISC-V RV32E ASIC with audio, spi, uart"      # One line description of what your project does
   language:     "verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
-  clock_hz:     0       # Clock frequency in Hz (or 0 if not applicable)
+  clock_hz:     50       # Clock frequency in Hz (or 0 if not applicable)
 
   # How many tiles your design occupies? A single tile is about 167x108 uM.
   tiles: "3x2"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2

projects/tt_um_kianv_bare_metal/stats/metrics.csv

@@ -1,2 +1,2 @@
 design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
-/work/src,tt_um_kianv_bare_metal,wokwi,flow completed,0h12m1s0ms,0h9m49s0ms,131763.09108361966,0.1148576576,65881.54554180983,67.58,76.62780000000001,937.42,6496,0,0,0,0,0,0,0,8,7,0,-1,-1,242797,56365,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,161146565.0,0.0,64.6,57.28,29.06,15.25,-1,4796,8510,348,3802,0,0,0,6080,110,55,134,225,836,267,42,1941,1270,1264,38,2846,1577,58,2631,7567,14679,110873.8368,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.68,0,sky130_fd_sc_hd,AREA 0
+/work/src,tt_um_kianv_bare_metal,wokwi,flow completed,0h12m10s0ms,0h9m57s0ms,131763.09108361966,0.1148576576,65881.54554180983,67.58,76.62780000000001,936.85,6496,0,0,0,0,0,0,0,8,7,0,-1,-1,242797,56365,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,161146565.0,0.0,64.6,57.28,29.06,15.25,-1,4796,8510,348,3802,0,0,0,6080,110,55,134,225,836,267,42,1941,1270,1264,38,2846,1577,58,2631,7567,14679,110873.8368,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,153.18,153.6,0.3,1,10,0.68,0,sky130_fd_sc_hd,AREA 0

projects/tt_um_kianv_bare_metal/tt_um_kianv_bare_metal.spef

@@ -1,6 +1,6 @@
 *SPEF "ieee 1481-1999"
 *DESIGN "tt_um_kianv_bare_metal"
-*DATE "17:49:49 Wednesday April 24, 2024"
+*DATE "22:41:07 Tuesday April 30, 2024"
 *VENDOR "The OpenROAD Project"
 *PROGRAM "OpenROAD"
 *VERSION "0889970d1790a2617e69f253221b8bd7626e51dc"