Skip to content

Commit

Permalink
feat: update project tt_um_toivoh_basilisc_2816 from toivoh/tt07-basi…
Browse files Browse the repository at this point in the history
…lisc-2816-cpu

Commit: 083c7e84b230531e8db850a7f748ee4a5d3d191a
Workflow: https://github.com/toivoh/tt07-basilisc-2816-cpu/actions/runs/9243244673
  • Loading branch information
TinyTapeoutBot authored and urish committed May 27, 2024
1 parent 9cf25af commit 34636c3
Show file tree
Hide file tree
Showing 7 changed files with 69,953 additions and 63,576 deletions.
4 changes: 2 additions & 2 deletions projects/tt_um_toivoh_basilisc_2816/commit_id.json
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt07 98e94823",
"repo": "https://github.com/toivoh/tt07-basilisc-2816-cpu",
"commit": "a7fe019f2706b07b4061e1eb8b4d9d6d0416a410",
"workflow_url": "https://github.com/toivoh/tt07-basilisc-2816-cpu/actions/runs/9241561595",
"commit": "083c7e84b230531e8db850a7f748ee4a5d3d191a",
"workflow_url": "https://github.com/toivoh/tt07-basilisc-2816-cpu/actions/runs/9243244673",
"sort_id": 1715511277520,
"openlane_version": "OpenLane 337ffbf4749b8bc6e8d8742ed9a595934142198b",
"pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"
Expand Down
2 changes: 1 addition & 1 deletion projects/tt_um_toivoh_basilisc_2816/stats/metrics.csv
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
/work/src,tt_um_toivoh_basilisc_2816,wokwi,flow completed,0h4m11s0ms,0h3m41s0ms,164413.59152356593,0.01795472,82206.79576178297,84.52,85.8823,586.98,1322,0,0,0,0,0,0,0,2,2,0,-1,-1,41541,11235,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,21784507.0,0.0,77.27,56.71,36.82,8.55,-1,1350,1909,216,759,0,0,0,1383,51,5,41,102,223,51,14,221,195,196,32,240,225,5,446,1476,2392,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,26.0,38.46153846153846,25,1,50,26.520,38.870,0.3,1,10,0.88,0,sky130_fd_sc_hd,AREA 0
/work/src,tt_um_toivoh_basilisc_2816,wokwi,flow completed,0h7m17s0ms,0h6m47s0ms,173881.85390805313,0.01795472,86940.92695402657,87.49,89.6677,624.96,1390,0,0,0,0,0,0,0,5,5,0,-1,-1,46986,12307,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,22484013.0,0.0,77.6,59.84,44.39,14.04,-1,1398,1970,217,773,0,0,0,1428,50,5,42,107,253,53,13,229,195,196,31,175,225,9,446,1561,2416,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,26.0,38.46153846153846,25,1,50,26.520,38.870,0.3,1,10,0.88,0,sky130_fd_sc_hd,AREA 0
125 changes: 65 additions & 60 deletions projects/tt_um_toivoh_basilisc_2816/stats/synthesis-stats.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3,78 +3,83 @@

=== tt_um_toivoh_basilisc_2816 ===

Number of wires: 1306
Number of wire bits: 1341
Number of wires: 1374
Number of wire bits: 1409
Number of public wires: 204
Number of public wire bits: 239
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1322
sky130_fd_sc_hd__a2111o_2 1
sky130_fd_sc_hd__a2111oi_2 2
sky130_fd_sc_hd__a211o_2 7
sky130_fd_sc_hd__a211oi_2 8
sky130_fd_sc_hd__a21bo_2 9
sky130_fd_sc_hd__a21boi_2 3
sky130_fd_sc_hd__a21o_2 40
sky130_fd_sc_hd__a21oi_2 37
sky130_fd_sc_hd__a221o_2 10
sky130_fd_sc_hd__a22o_2 19
sky130_fd_sc_hd__a22oi_2 2
Number of cells: 1390
sky130_fd_sc_hd__a2111o_2 5
sky130_fd_sc_hd__a2111oi_2 1
sky130_fd_sc_hd__a211o_2 22
sky130_fd_sc_hd__a211oi_2 3
sky130_fd_sc_hd__a21bo_2 4
sky130_fd_sc_hd__a21boi_2 2
sky130_fd_sc_hd__a21o_2 51
sky130_fd_sc_hd__a21oi_2 31
sky130_fd_sc_hd__a221o_2 7
sky130_fd_sc_hd__a221oi_2 2
sky130_fd_sc_hd__a22o_2 21
sky130_fd_sc_hd__a22oi_2 5
sky130_fd_sc_hd__a2bb2o_2 4
sky130_fd_sc_hd__a311o_2 1
sky130_fd_sc_hd__a31o_2 14
sky130_fd_sc_hd__a31oi_2 2
sky130_fd_sc_hd__a32o_2 8
sky130_fd_sc_hd__a41o_2 5
sky130_fd_sc_hd__and2_2 25
sky130_fd_sc_hd__and2b_2 5
sky130_fd_sc_hd__and3_2 25
sky130_fd_sc_hd__and3b_2 12
sky130_fd_sc_hd__and4_2 9
sky130_fd_sc_hd__and4b_2 3
sky130_fd_sc_hd__and4bb_2 2
sky130_fd_sc_hd__buf_1 188
sky130_fd_sc_hd__a311o_2 3
sky130_fd_sc_hd__a311oi_2 2
sky130_fd_sc_hd__a31o_2 18
sky130_fd_sc_hd__a31oi_2 4
sky130_fd_sc_hd__a32o_2 3
sky130_fd_sc_hd__a41o_2 3
sky130_fd_sc_hd__and2_2 30
sky130_fd_sc_hd__and2b_2 9
sky130_fd_sc_hd__and3_2 38
sky130_fd_sc_hd__and3b_2 5
sky130_fd_sc_hd__and4_2 14
sky130_fd_sc_hd__and4b_2 4
sky130_fd_sc_hd__and4bb_2 5
sky130_fd_sc_hd__buf_1 192
sky130_fd_sc_hd__conb_1 20
sky130_fd_sc_hd__dfxtp_2 198
sky130_fd_sc_hd__inv_2 33
sky130_fd_sc_hd__mux2_2 205
sky130_fd_sc_hd__nand2_2 78
sky130_fd_sc_hd__nand3_2 9
sky130_fd_sc_hd__inv_2 36
sky130_fd_sc_hd__mux2_2 203
sky130_fd_sc_hd__nand2_2 80
sky130_fd_sc_hd__nand3_2 11
sky130_fd_sc_hd__nand3b_2 2
sky130_fd_sc_hd__nand4_2 4
sky130_fd_sc_hd__nand4b_2 2
sky130_fd_sc_hd__nor2_2 59
sky130_fd_sc_hd__nand4b_2 1
sky130_fd_sc_hd__nor2_2 74
sky130_fd_sc_hd__nor2b_2 1
sky130_fd_sc_hd__nor3_2 10
sky130_fd_sc_hd__nor3_2 5
sky130_fd_sc_hd__nor3b_2 1
sky130_fd_sc_hd__nor4_2 2
sky130_fd_sc_hd__o2111a_2 4
sky130_fd_sc_hd__o211a_2 23
sky130_fd_sc_hd__nor4_2 1
sky130_fd_sc_hd__nor4b_2 2
sky130_fd_sc_hd__o2111a_2 2
sky130_fd_sc_hd__o2111ai_2 2
sky130_fd_sc_hd__o211a_2 20
sky130_fd_sc_hd__o211ai_2 1
sky130_fd_sc_hd__o21a_2 22
sky130_fd_sc_hd__o21ai_2 22
sky130_fd_sc_hd__o21ba_2 6
sky130_fd_sc_hd__o221a_2 6
sky130_fd_sc_hd__o22a_2 7
sky130_fd_sc_hd__o22ai_2 1
sky130_fd_sc_hd__o2bb2a_2 12
sky130_fd_sc_hd__o311a_2 4
sky130_fd_sc_hd__o311ai_2 1
sky130_fd_sc_hd__o31a_2 8
sky130_fd_sc_hd__o31ai_2 3
sky130_fd_sc_hd__o32a_2 2
sky130_fd_sc_hd__o41a_2 2
sky130_fd_sc_hd__or2_2 49
sky130_fd_sc_hd__or2b_2 8
sky130_fd_sc_hd__or3_2 24
sky130_fd_sc_hd__or3b_2 9
sky130_fd_sc_hd__or4_2 10
sky130_fd_sc_hd__or4b_2 8
sky130_fd_sc_hd__o21a_2 29
sky130_fd_sc_hd__o21ai_2 23
sky130_fd_sc_hd__o21ba_2 4
sky130_fd_sc_hd__o21bai_2 2
sky130_fd_sc_hd__o221a_2 4
sky130_fd_sc_hd__o221ai_2 1
sky130_fd_sc_hd__o22a_2 10
sky130_fd_sc_hd__o22ai_2 3
sky130_fd_sc_hd__o2bb2a_2 7
sky130_fd_sc_hd__o311a_2 2
sky130_fd_sc_hd__o31a_2 12
sky130_fd_sc_hd__o31ai_2 1
sky130_fd_sc_hd__o32a_2 5
sky130_fd_sc_hd__o32ai_2 2
sky130_fd_sc_hd__o41a_2 3
sky130_fd_sc_hd__or2_2 65
sky130_fd_sc_hd__or2b_2 9
sky130_fd_sc_hd__or3_2 14
sky130_fd_sc_hd__or3b_2 10
sky130_fd_sc_hd__or4_2 9
sky130_fd_sc_hd__or4b_2 5
sky130_fd_sc_hd__or4bb_2 1
sky130_fd_sc_hd__xnor2_2 17
sky130_fd_sc_hd__xor2_2 7
sky130_fd_sc_hd__xnor2_2 15
sky130_fd_sc_hd__xor2_2 6

Chip area for module '\tt_um_toivoh_basilisc_2816': 13454.153600
Chip area for module '\tt_um_toivoh_basilisc_2816': 13927.107200

Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,8 @@ MACRO tt_um_toivoh_basilisc_2816
PIN rst_n
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.213000 ;
ANTENNAGATEAREA 0.196500 ;
ANTENNADIFFAREA 0.434700 ;
PORT
LAYER met4 ;
RECT 151.190 110.520 151.490 111.520 ;
Expand All @@ -77,6 +78,7 @@ MACRO tt_um_toivoh_basilisc_2816
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.196500 ;
ANTENNADIFFAREA 0.434700 ;
PORT
LAYER met4 ;
RECT 147.510 110.520 147.810 111.520 ;
Expand All @@ -86,6 +88,7 @@ MACRO tt_um_toivoh_basilisc_2816
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.196500 ;
ANTENNADIFFAREA 0.434700 ;
PORT
LAYER met4 ;
RECT 143.830 110.520 144.130 111.520 ;
Expand Down Expand Up @@ -403,11 +406,11 @@ MACRO tt_um_toivoh_basilisc_2816
LAYER li1 ;
RECT 2.760 2.635 158.240 108.885 ;
LAYER met1 ;
RECT 1.910 1.400 160.010 110.460 ;
RECT 2.370 0.040 160.010 111.140 ;
LAYER met2 ;
RECT 1.940 0.835 159.980 110.685 ;
RECT 2.400 0.010 159.990 111.170 ;
LAYER met3 ;
RECT 2.365 0.855 159.030 110.665 ;
RECT 3.520 0.175 160.015 110.665 ;
LAYER met4 ;
RECT 4.690 110.120 7.270 110.665 ;
RECT 8.370 110.120 10.950 110.665 ;
Expand Down
Loading

0 comments on commit 34636c3

Please sign in to comment.