Skip to content

Commit

Permalink
feat: update project tt_um_eater_8bit from jasonkaufmann/tt07-beneate…
Browse files Browse the repository at this point in the history 
…r8bit

Commit: 2220e3ec09fef4cbbfbde8cc4b850d104e2dca27
Workflow: https://github.com/jasonkaufmann/tt07-beneater8bit/actions/runs/8991088556
  • Loading branch information
@TinyTapeoutBot @urish
TinyTapeoutBot authored and urish committed May 8, 2024
1 parent 69463c7 commit 2b52474
Show file tree
Hide file tree
Showing 8 changed files with 55,573 additions and 53,900 deletions.
6 changes: 3 additions & 3 deletions projects/tt_um_eater_8bit/commit_id.json
View file
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
{
"app": "Tiny Tapeout tt07 af1f250d",
"app": "Tiny Tapeout tt07 0bc5812f",
"repo": "https://github.com/jasonkaufmann/tt07-beneater8bit",
"commit": "a968a929dac6fd3538e7960e1a6f6c3d8526633e",
"workflow_url": "https://github.com/jasonkaufmann/tt07-beneater8bit/actions/runs/8978146930",
"commit": "2220e3ec09fef4cbbfbde8cc4b850d104e2dca27",
"workflow_url": "https://github.com/jasonkaufmann/tt07-beneater8bit/actions/runs/8991088556",
"sort_id": 1714902852153,
"openlane_version": "OpenLane 337ffbf4749b8bc6e8d8742ed9a595934142198b",
"pdk_version": "open_pdks cd1748bb197f9b7af62a54507de6624e30363943"
Expand Down
56 changes: 49 additions & 7 deletions projects/tt_um_eater_8bit/docs/info.md
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,61 @@ You can also include images in this folder and reference them in the markdown. E
512 kb in size, and the combined size of all images must be less than 1 MB.
-->

## How it works
# How it works

This is Ben Eater's 8 Bit computer on an ASIC!

## How to test
All credit for the design, amazing instructional videos, and diagams below goes to Ben Eater.

![overview-with-chip-descriptions1](https://github.com/jasonkaufmann/ice40FPGAProjects/assets/41923667/0995715c-218d-4779-85be-36083b9d3e90)

## High level overview

Full Computer Schematic:
![high_level_diagram](https://github.com/jasonkaufmann/ice40FPGAProjects/assets/41923667/f122dd7a-d9fc-4a3f-b961-beee40d9fa35)

Simple Control Signal Diagram:
![simple_diagram](https://github.com/jasonkaufmann/ice40FPGAProjects/assets/41923667/25b4c402-da54-4372-9458-7b1f4c095c3a)

*Note: The output register and logic to display the digits is not included on the ASIC. The 8 bit output value is put on the bus and the "output register in" control signal (oi) is on an output pin. This way you can use the data bus as a general purpose interface to any display you want. (i.e. you can read in the data to the RP2040 and show it on the screen, you can build the actual output register as shown in the videos and connect it to the PMOD header, etc.)

ASIC 2D:
![asic](https://github.com/jasonkaufmann/ice40FPGAProjects/assets/41923667/75a44e3f-531d-49fc-af93-cacfedb2afdd)

ASIC 3D:
![asic_3d](https://github.com/jasonkaufmann/ice40FPGAProjects/assets/41923667/da51dff7-3b9d-46f9-a9b1-e6c4dc9bc3e7)

# How to test

To program the computer follow these steps:
- enable my design in TT
- send prog_mode bit high
- on each next clock pulse, put the 8 bit data you wanna store on the I/0 lines
- since this computer only has a 4 bit address space you can only store 18
- see https://eater.net/8bit/ on how to program the computer (what the opcodes are)
- set the four prog_address bits to the address you want to write to, put the data you want to store at that address on the I/O lines, and then pulse the clock.
- since this computer only has a 4 bit address space you can only store 16 bytes total in the internal RAM.
- see https://eater.net/8bit/ for more details.

## Instructions
| OPC | DEC | HEX | DESCRIPTION |
|-----|-----|------|----------------------------------------------------------------|
| NOP | 00 | 0000 | |
| LDA | 01 | 0001 | Load contents of memory address aaaa into register A. |
| ADD | 02 | 0010 | Put content of memory address aaaa into register B, add A + B, store result in A. |
| SUB | 03 | 0011 | Put content of memory address aaaa into register B, subtract A - B, store result in register A. |
| STA | 04 | 0100 | Store contents of register A at memory address aaaa. |
| LDI | 05 | 0101 | Load 4 bit immediate value in register A (loads 'vvvv' in A). |
| JMP | 06 | 0110 | Unconditional jump. Set program counter (PC) to aaaa, resume execution from that memory address. |
| JC | 07 | 0111 | Jump if carry. Set PC to aaaa when carry flag is set and resume from there. When carry flag is not set, resume normally. |
| JZ | 08 | 1000 | Jump if zero. As above, but when zero flag is set. |
| | 09 | 1001 | |
| | 10 | 1010 | |
| | 11 | 1011 | |
| | 12 | 1100 | |
| | 13 | 1101 | |
| OUT | 14 | 1110 | Output register A to 7 segment LED display as decimal. |
| HLT | 15 | 1111 | Halt execution. |

# External hardware

## External hardware
You will need the RP2040 or a similar microcontroller to write the program into the internal memory. If you really wanted to, you could go old school and use DIP switches and a manual clock pulse as well.

You will want to make the output register on a breadboard to connect it to the 8 bit I/O lines. See https://eater.net/8bit/output for detailed design info.
You will want to make the output register on a breadboard to connect it to the 8 bit I/O lines from the PMOD header. See https://eater.net/8bit/output for detailed design info.
2 changes: 1 addition & 1 deletion projects/tt_um_eater_8bit/stats/metrics.csv
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY
/work/src,tt_um_eater_8bit,wokwi,flow completed,0h2m10s0ms,0h1m40s0ms,77144.52989157947,0.03634736,38572.264945789735,43.65,45.953,575.24,1308,0,0,0,0,0,0,0,0,0,0,-1,-1,34225,9607,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,22201354.0,0.0,27.58,34.5,1.53,8.54,-1,969,1371,134,536,0,0,0,1142,12,1,42,19,237,72,27,140,272,324,11,1694,456,4,672,1402,4228,34255.3536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,55.080,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
/work/src,tt_um_eater_8bit,wokwi,flow completed,0h2m6s0ms,0h1m34s0ms,83637.4361164057,0.03634736,41818.71805820285,43.61,50.2192,559.16,1302,0,0,0,0,0,0,0,0,0,0,-1,-1,33805,9813,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,21341478.0,0.0,27.73,34.24,2.01,9.35,-1,970,1372,135,537,0,0,0,1143,12,1,43,21,237,72,27,141,273,325,11,1556,456,9,746,1520,4287,34255.3536,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,55.080,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0
80 changes: 39 additions & 41 deletions projects/tt_um_eater_8bit/stats/synthesis-stats.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,70 +3,68 @@

=== tt_um_eater_8bit ===

Number of wires: 1260
Number of wire bits: 1295
Number of public wires: 274
Number of public wire bits: 309
Number of wires: 1254
Number of wire bits: 1289
Number of public wires: 275
Number of public wire bits: 310
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1308
sky130_fd_sc_hd__a211o_2 1
sky130_fd_sc_hd__a21bo_2 1
sky130_fd_sc_hd__a21boi_2 1
sky130_fd_sc_hd__a21o_2 10
sky130_fd_sc_hd__a21oi_2 14
sky130_fd_sc_hd__a221o_2 11
sky130_fd_sc_hd__a22o_2 16
sky130_fd_sc_hd__a22oi_2 1
Number of cells: 1302
sky130_fd_sc_hd__a211o_2 3
sky130_fd_sc_hd__a21bo_2 2
sky130_fd_sc_hd__a21boi_2 2
sky130_fd_sc_hd__a21o_2 9
sky130_fd_sc_hd__a21oi_2 8
sky130_fd_sc_hd__a221o_2 6
sky130_fd_sc_hd__a22o_2 12
sky130_fd_sc_hd__a2bb2o_2 1
sky130_fd_sc_hd__a311o_2 1
sky130_fd_sc_hd__a31o_2 20
sky130_fd_sc_hd__a32o_2 11
sky130_fd_sc_hd__a41o_2 2
sky130_fd_sc_hd__a32o_2 17
sky130_fd_sc_hd__and2_2 15
sky130_fd_sc_hd__and2b_2 5
sky130_fd_sc_hd__and3_2 32
sky130_fd_sc_hd__and4_2 21
sky130_fd_sc_hd__and4b_2 3
sky130_fd_sc_hd__and2b_2 4
sky130_fd_sc_hd__and3_2 36
sky130_fd_sc_hd__and3b_2 1
sky130_fd_sc_hd__and4_2 18
sky130_fd_sc_hd__and4b_2 5
sky130_fd_sc_hd__and4bb_2 3
sky130_fd_sc_hd__buf_1 246
sky130_fd_sc_hd__buf_1 253
sky130_fd_sc_hd__buf_2 1
sky130_fd_sc_hd__conb_1 22
sky130_fd_sc_hd__dfrtp_2 119
sky130_fd_sc_hd__dfstp_2 2
sky130_fd_sc_hd__dfxtp_2 128
sky130_fd_sc_hd__ebufn_2 40
sky130_fd_sc_hd__inv_2 88
sky130_fd_sc_hd__mux2_2 188
sky130_fd_sc_hd__inv_2 82
sky130_fd_sc_hd__mux2_2 192
sky130_fd_sc_hd__mux4_2 32
sky130_fd_sc_hd__nand2_2 51
sky130_fd_sc_hd__nand3_2 7
sky130_fd_sc_hd__nand2_2 53
sky130_fd_sc_hd__nand3_2 5
sky130_fd_sc_hd__nand3b_2 3
sky130_fd_sc_hd__nand4_2 1
sky130_fd_sc_hd__nor2_2 35
sky130_fd_sc_hd__nor2_2 38
sky130_fd_sc_hd__nor2b_2 1
sky130_fd_sc_hd__nor3_2 4
sky130_fd_sc_hd__nor3_2 1
sky130_fd_sc_hd__nor3b_2 1
sky130_fd_sc_hd__nor4b_2 1
sky130_fd_sc_hd__o211a_2 9
sky130_fd_sc_hd__o211a_2 6
sky130_fd_sc_hd__o21a_2 12
sky130_fd_sc_hd__o21ai_2 11
sky130_fd_sc_hd__o21ba_2 1
sky130_fd_sc_hd__o221a_2 1
sky130_fd_sc_hd__o221ai_2 3
sky130_fd_sc_hd__o22a_2 6
sky130_fd_sc_hd__o22ai_2 2
sky130_fd_sc_hd__o21ai_2 10
sky130_fd_sc_hd__o221a_2 2
sky130_fd_sc_hd__o221ai_2 1
sky130_fd_sc_hd__o22a_2 5
sky130_fd_sc_hd__o22ai_2 1
sky130_fd_sc_hd__o2bb2a_2 1
sky130_fd_sc_hd__o311a_2 1
sky130_fd_sc_hd__o31a_2 17
sky130_fd_sc_hd__or2_2 34
sky130_fd_sc_hd__or2b_2 4
sky130_fd_sc_hd__or3_2 10
sky130_fd_sc_hd__or3b_2 26
sky130_fd_sc_hd__o31a_2 14
sky130_fd_sc_hd__or2_2 32
sky130_fd_sc_hd__or2b_2 5
sky130_fd_sc_hd__or3_2 7
sky130_fd_sc_hd__or3b_2 25
sky130_fd_sc_hd__or4_2 10
sky130_fd_sc_hd__or4b_2 1
sky130_fd_sc_hd__xnor2_2 11
sky130_fd_sc_hd__xor2_2 10
sky130_fd_sc_hd__xor2_2 21

Chip area for module '\tt_um_eater_8bit': 14436.345600
Chip area for module '\tt_um_eater_8bit': 14426.336000

Binary file modified projects/tt_um_eater_8bit/tt_um_eater_8bit.gds
View file
Binary file not shown.
24 changes: 12 additions & 12 deletions projects/tt_um_eater_8bit/tt_um_eater_8bit.lef
View file
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,7 @@ MACRO tt_um_eater_8bit
PIN ui_in[6]
DIRECTION INPUT ;
USE SIGNAL ;
ANTENNAGATEAREA 0.159000 ;
ANTENNAGATEAREA 0.126000 ;
PORT
LAYER met4 ;
RECT 125.430 224.760 125.730 225.760 ;
Expand Down Expand Up @@ -219,8 +219,8 @@ MACRO tt_um_eater_8bit
PIN uio_oe[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNAGATEAREA 2.110500 ;
ANTENNADIFFAREA 0.891000 ;
ANTENNAGATEAREA 2.302500 ;
ANTENNADIFFAREA 1.590400 ;
PORT
LAYER met4 ;
RECT 29.750 224.760 30.050 225.760 ;
Expand Down Expand Up @@ -305,7 +305,7 @@ MACRO tt_um_eater_8bit
PIN uio_out[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
ANTENNAGATEAREA 0.910500 ;
ANTENNAGATEAREA 0.789000 ;
ANTENNADIFFAREA 8.910000 ;
PORT
LAYER met4 ;
Expand Down Expand Up @@ -521,14 +521,14 @@ MACRO tt_um_eater_8bit
RECT 148.210 224.360 150.790 224.905 ;
RECT 151.890 224.360 154.470 224.905 ;
RECT 3.975 223.680 155.185 224.360 ;
RECT 3.975 33.495 20.995 223.680 ;
RECT 23.395 33.495 40.430 223.680 ;
RECT 42.830 33.495 59.865 223.680 ;
RECT 62.265 33.495 79.300 223.680 ;
RECT 81.700 33.495 98.735 223.680 ;
RECT 101.135 33.495 118.170 223.680 ;
RECT 120.570 33.495 137.605 223.680 ;
RECT 140.005 33.495 155.185 223.680 ;
RECT 3.975 45.735 20.995 223.680 ;
RECT 23.395 45.735 40.430 223.680 ;
RECT 42.830 45.735 59.865 223.680 ;
RECT 62.265 45.735 79.300 223.680 ;
RECT 81.700 45.735 98.735 223.680 ;
RECT 101.135 45.735 118.170 223.680 ;
RECT 120.570 45.735 137.605 223.680 ;
RECT 140.005 45.735 155.185 223.680 ;
END
END tt_um_eater_8bit
END LIBRARY
Expand Down
Loading

0 comments on commit 2b52474

Please sign in to comment.