Politecnico di Milano
Progetto finale di Reti Logiche - Anno accademico 2019/2020
Working-Zone Encoding for Reducing the Energy in Microprocessor Address Buses.
Implementazione in VHDL del metodo di codifica a bassa dissipazione di potenza denominato “Working Zone” basato sulla ricerca:
E. Musoll, T. Lang and J. Cortadella, "Working-zone encoding for reducing the energy in microprocessor address buses," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 6, no. 4, pp. 568-572, Dec. 1998, doi: 10.1109/92.736129.
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